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TI Home » TI E2E Community » Support Forums » Data Converters » Audio Converters » Audio Converters Forum » All Tags » AIC23
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Welcome to the Audio Converters Section of the TI E2E Support Community. Ask questions, share knowledge, explore ideas, and help solve problems with fellow engineers. To post a question, click on the forum tab then "New Post".

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AIC23
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Related Posts
  • Forum Post: FAQ: How do I address multiple AIC23 devices on one I2C bus?

    Mike Caruso Mike Caruso
    A nswer: The AIC23 will respond to two I2C addresses depending on the state of the CS pin (PW pin 21). if CS = 0, the I2C address is 0011010 if CS = 1, the I2C address is 0011011 If two AIC23 devices are on the I2C bus, their CS pins can be tied (one to ground and one to VDD) and the I2C master can address...
    on Nov 13, 2008
  • Forum Post: FAQ: What is the difference between the AIC23 and the AIC23B?

    Mike Caruso Mike Caruso
    A nswer: The AIC23 B has a 0dB option for side-tone attenuation and a glitch rejection circuit on the I2C bus pins (SDIN and SCLK).
    on Nov 13, 2008
  • Forum Post: FAQ: When I write a 0x1FF to register 0001111 (RESET), the AIC23 responds with an ACK. But when I follow this command by writing a 0x000 to register 0001111 the AIC23 responds with a NACK. Note that I defined the AIC23 data using 3 HEX bits. This is to emp

    Mike Caruso Mike Caruso
    A nswer: In order to accomplish a RESET you must write the following sequence: 0x34 0x1E 0x00 Where: 0x34 = IIC Address. 0x1E = the RESET Register Address shifted left one bit because the MSB of the Data is placed into the LSB of the address. 0x00 = the lower 8 bits of the data is to represent a RESET...
    on Nov 13, 2008
  • Forum Post: FAQ: Are the outputs of the AIC23 or AIC23B tri-stated (High impedance) at power up? Can they be put into high impedance?

    Mike Caruso Mike Caruso
    A nswer: No, the output drivers of both devices are NOT Hi-Z at powerup nor can they be configured that way. The output drivers are, however, not powered up until the outputs are powered on by writing to the Power Down Control register.
    on Nov 13, 2008
  • Forum Post: FAQ: When running the AIC23 GUI, an error message will pop up saying "privileged instruction". ?

    Mike Caruso Mike Caruso
    A nswer: You are running a older version of the AIC23 GUI which will not work on Windows NT, Windows 2K or Windows XP. You must run version 2.0 or later to operate on Window NT type operating systems. Also, verify that you reboot the computer after installing the GUI.
    on Nov 13, 2008
  • Forum Post: FAQ: What is the MTBF and FIT for the AIC23?

    Mike Caruso Mike Caruso
    A nswer: The maximum resolution of the ADC and DAC internal digital filters are 24 bits within the AIC23 . Data can be received and output at 16, 20, 24 and 32 bits but internally it treats all data as 24 bits. There are a few sceneries I will try to describe on how the ADC and DAC digital filters process...
    on Nov 13, 2008
  • Forum Post: FAQ: What are the characteristics of the Microphone Input?

    Mike Caruso Mike Caruso
    A nswer: If the microphone does not require a bias of greater than 3ma and the gain of the microphone input is sufficient then the AIC23 should work just fine. I will summarize the MIC Power tolerance to the AIC23 to give you more to work with. The ADC Full Scale input is 1.0V RMS at AVDD=3.3 Volts....
    on Nov 13, 2008
  • Forum Post: FAQ: What is the correct default value for the Digital Audio path Control Register for the AIC23 and DAC23 (reg:0000101)?

    Mike Caruso Mike Caruso
    A nswer: There are four bits within this register in the AIC23 that need to be programmed. They are bits D0-D3. The Data Sheet has an error in the D0 settings but the default is correct. There is an error in the D2 default and in the D3 default. Bit D0 ADCHP ADC High Pass Filter 1=Disabled 0=Enabled...
    on Nov 13, 2008
  • Forum Post: FAQ: Can AIC23 at 12MHz MCLK in slave mode? What is the sampling rate #bclk #reg. setting would be?

    Mike Caruso Mike Caruso
    A nswer: It is ok to run 12Mhz MCLK. You determine the sampling rate you want. The data sheet has all that info and what register. If you are in slave, then you supply the BITCLOCK. Sampling rate and HP (I assume you mean headphone), have nothing in common. One does not depend on the other. You can have...
    on Nov 13, 2008
  • Forum Post: FAQ: Please give me examples of various IIC transactions and corresponding register setting in the AIC23?

    Mike Caruso Mike Caruso
    A nswer: /* Left Line Input Control: Unmuted */ 0x34 0x00 0x00 /* Right Line Input Control: Unmuted */ 0x34 0x02 0x00 /* Power Down Control: line=on, DAC=on, out=on, CLK=on, OSC=on */ 0x34 0x0C 0x06 /* Analog Audio Path Control: bypass=disabled */ 0x34 0x08 0x10 /* Digital Audio Interface...
    on Nov 13, 2008
  • Forum Post: TLV320AIC23B problem with I2S

    Holger50360 Holger50360
    Hello, I tried to interface with the AIC23 in DSP mode, USB mode, slave mode, 96 kHz samples, supplying both MCLK and BCLK with the same 12 MHz clock. Is this possible? It does not seem to be: DOUT is unsynchronized to LRCOUT and its shortest bits look like 6 MHz BCLK. SPI commands are working...
    on May 18, 2010
  • Forum Post: Re: TLV320AIC23B problem with I2S

    Holger50360 Holger50360
    I found the solution. Problem is the reset register F which I wrote first to 1FF. Everything works fine as long as I don't touch it. When I write 1FF the codec ignores BCLK, LRCIN/OUT and sends data with 6 MHz. So, don't touch the reset register. bye Holger
    on May 20, 2010
  • Forum Post: Re: TLV320AIC23B problems with I2S master too

    Holger50360 Holger50360
    I found the solution. Problem is the reset register F which I wrote to 1FF first. Everything works fine as long as I don't touch it. When I write 1FF, the codec outputs strange BCLK, LRCIN/OUT. So, don't touch the reset register. (btw. #5 has to be 00 in stead of 08, which mutes the...
    on May 20, 2010
  • Forum Post: TLV320AIC23B thermal pad connection

    Andreas Geisreiter Andreas Geisreiter
    Hello, we will use the QFN 28 package of the AIC23B. I don't understand the description of the thermal pad connection in the datasheet on page A-3 ( http://www.ti.com/lit/gpn/tlv320aic23b ). Is it possible to connect the thermal pad to GND or not? Best regards, Andreas
    on Feb 1, 2011
  • Forum Post: TLV320AIC23B crystal selection

    Andreas Geisreiter Andreas Geisreiter
    Hello, I can't find the specifications for the 12MHz crystal in the datasheet ( http://www.ti.com/lit/gpn/tlv320aic23b ). Which load capacitance, ESR do I need? Best regards, Andreas
    on Feb 2, 2011
  • Forum Post: Use Headphone out of TLV320AIC23B in DC coupled mode

    Andreas Geisreiter Andreas Geisreiter
    Hello, I will use the headphone output of the AIC23B without capacitors in pseudo-differential mode with virtual ground . Is it possible with the ACI23B? And is it possible to use the VMID pin for the virtual ground? And which GND do I have to connect to the HPGND pin, GND or the virtual GND? ...
    on Feb 2, 2011
  • Forum Post: how to improve AIC23 audio record system SNR level

    qunchao lee qunchao lee
    My system`s main function is to sample audio datas,process,and play them back.The process core is a ST semi `s STM32F103RC processor,plus TI`s TLV320AIC23B audio codec.Of course audio preamps(op amp).The power supply is a LM2576.Now the problem is,it is hard to handle the hole noise level of this system...
    on Feb 13, 2011
  • Forum Post: tms320c6455dsk: using muxed gpio/mcbsp1 pins as gpio on J3 connector

    Vito Francesco Annese Vito Francesco Annese
    Hello everybody, I'm working on a TMS320C6455DSK board. I want to use the GPIO pins that can be reached through the J3 connector on the board. After power-on of the board, I checked the pins 33, 35, 36, 39, 41, 42 of the J3 connector which are linked to the GPIO interface pins muxed with the McBSP1...
    on May 18, 2011
  • Forum Post: TLV320AIC23B problems with I2S master too

    Holger50360 Holger50360
    Hello, I tried the master mode of the codec and get neither LRCIN nor LRCOUT as described in the datasheet. Both look like data instead. I feed MCLK=12 MHz and tried the USB mode and 96 kSamples/s. The BCLK is not as supposed equal to MCLK but it is 6 MHz SPI commands are working fine, my configuration...
    on May 18, 2010
  • Forum Post: Timing Questions about TLV320AIC34

    Bruno Paillard Bruno Paillard
    We are starting a new project with several TLV320AIC34 on the same McBSP. In this project the relative synchronization of the various channels is important, and I have the following questions: - If several devices (configured as slaves) are cascaded on the same McBSP bus, is it possible for them to use...
    on Sep 30, 2011
  • Forum Post: Re: TLV320AIC3110 codec linux driver

    Pradeep TR Pradeep TR
    We have used Audio Codec TLV320AIC3110 in our custom boad with TI8148 in EVM we have TLV320AIC3106 which is not register level compatible with the 3110. So we are able to configure Audio Codec it is connected to McASP2 as much as same in the EVM with pin to pin compatible in our custom board...
    on Feb 18, 2012
  • Forum Post: Re: TLV320AIC3110 codec linux driver

    Pradeep TR Pradeep TR
    We have used Audio Codec TLV320AIC3110 in our custom boad with TI8148 in EVM we have TLV320AIC3106 which is not register level compatible with the 3110. So we are able to configure Audio Codec it is connected to McASP2 as much as same in the EVM with pin to pin compatible in our custom board...
    on Feb 18, 2012
  • Forum Post: problem with tlv320aic23bpw

    Serguei Boulgakov Serguei Boulgakov
    Hello all! I'm using tlv320aic23pbw for input (from linear input) and output (to headphone output) audio stream under linux. My purpose is record MP3 file and playing audio stream simultaneously. These actions (record and playing) work correct separately but if I start theirs together output is...
    on Jan 15, 2013
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