I. When a miniDSP is powered off:

Its C-RAM (or coefficient memory) can be accessed by the control bus. The miniDSP does not have access to C-RAM.

Its I-RAM (or instruction memory) can be accessed by the control bus. The miniDSP does not have access to I-RAM.

II. When a miniDSP is powered up (non-adaptive mode):

Its C-RAM can be accessed by the miniDSP. The control bus does not have access to C-RAM (reading the registers return 0x00).

Its I-RAM can be accessed by the miniDSP. The control bus does not have access to I-RAM (reading the registers return 0x00).

III. When a miniDSP is powered up (adaptive mode):

One of the C-RAM buffers can be accessed by the miniDSP. The control bus has access to the other C-RAM buffer.

Its I-RAM can be accessed by the miniDSP. The control bus does not have access to I-RAM (reading the registers return 0x00).

Applying a software or hardware /RESET clears C-RAM to default and resets all other registers. I-RAM remains as programmed until power is removed.

Having said the above, C-RAM is shared with both miniDSP and PRB modes. I-RAM is unrelated to the PRB modes and only applies to miniDSP mode. The user can program I-RAM beforehand, use PRB mode and then switch to miniDSP mode. However, the DACs and ADCs must be powered off before switching.

Additionally, C-RAM should be programmed each time with the correct data according to each mode (PRB or miniDSP). A software reset will set C-RAM coefficients automatically for PRB modes.

For more details on C-RAM access refer to: http://focus.ti.com/lit/an/slaa425b/slaa425b.pdf