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TLV5637

Michael Laajanen
Prodigy 110 points
Other Parts Discussed in Thread: TLV5637

Hi

I have some problems using the TLV5637, is this the correct forum for DACs?

Michael

  • 0
    TI__Genius 10615 points

    Hi Michael,

    You can post your DAC questions here, or in the Precision Data Converters forum.

    What problems are you having with this device? Can you share a schematic and/or oscilloscope captures of the behavior you are observing?

  • 0 in reply to Eugenio Mejia
    Prodigy 110 points
    Hello Eugenio

    My problem is about the setup and control of the two channels(A and B).
    I would like to first set channel B a specific value and then I like to set A without affecting B.

    But I can not make it work as wished.

    What I do is make a initial setup of the channel, say channel A by writing 0xc000 of for B 0xd000

    Then depending of what channel I write for A 0xCxxx where x is the value left justified of for B 0x4xxx.

    Are you familiar with this DAC?
  • 0 in reply to Michael Laajanen
    TI__Genius 10615 points

    Michael,

    I have not worked with this DAC in specific, but I have worked with very similar devices.

    So in this scenario, you want to:

    • Use Fast-mode
    • DAC A data = 0x100
    • DAC B data = 0x200

    In order to do this, you would have to take a look at the Register Select Bits, in page 11 of the TLV5637 datasheet.

    First you would write the DAC B data to BUFFER (R1 R2 = 01). Then you would Write data to DAC A and update DAC B with BUFFER content (R1 R2 = 10).

    It would look like this:

    1. 0x5200
    2. 0xC100

    You can repeat this over and over, while changing the DAC data that you are writing every time.

    Hopefully this is clear enough, this is a very old device and the interface can be a little tricky sometimes. If you still have any questions please do let me know.

  • 0 in reply to Eugenio Mejia
    Prodigy 110 points
    Hi again

    Thanks for so prompt answers :) But I dont really get it. First you say R1 R2, but we only have R0 R1? Is R2 R1 and R1 R0?
    Second DAC A data = 0x100, this is a 10 bit dac with the 10 bits arranged D11-D2!

    So could you help me abit more ?

    Michael
  • 0 in reply to Michael Laajanen
    TI__Genius 10615 points

    Michael Laajanen said:
    First you say R1 R2, but we only have R0 R1? Is R2 R1 and R1 R0?

    Apologies. It is as you say. I meant R1 R0.

    1. First using R1R0 = 01, to store the desired DAC B data into BUFFER.
    2. Then using R1R0 = 10, to update DAC B, and write new data to DAC A.

    Michael Laajanen said:
    Second DAC A data = 0x100, this is a 10 bit dac with the 10 bits arranged D11-D2!

    I used 0x100, because there are 12 new data bits in the SPI interface. Where the left most 10-bits are real data and the right most 2-bits are always zeroes. This means that the maximum possible code is 0xFFC or 1111 1111 1100.


    I hope I cleared the confusion here.

  • 0 in reply to Eugenio Mejia
    Prodigy 110 points

    Hello Eugenio,

    I hope that you can bare with me alittle longer :)

    Let me better explain the issues I have and what I need to do.


    I have two cases:

    1. Setting DAC A to a fixed value, then setting DAC B over and over again.

    2. Setting DAC B to a fixed value, then setting DAC A over and over again.

    So, I do not want to send down the value for B and A in order to get B out only.

    For case 1.

    When I set DAC A everything works fine, then I switch to B I get no changes on B the first time I write to CH B but after that CH B works so I need to

    perform dummy write.

    I write as below to the DAC

    0xC000

    0xCxxx DOES NOT WORK (where xxx is a 10 bit DAC value left justified two bits and the two LSB are 0, could 0xCFFD for a full swing of the DAC)

    0xCxxx second write works fine

    0xCxxx third write works fine

    The same for case 2.

    0xD000

    0x4xxx DOESN not work

    0x4xxx works

    0x4xxx works

    So what have I missunderstood

    cheers

    Michael

  • 0 in reply to Michael Laajanen
    TI__Genius 10615 points

    Can you share an oscilloscope capture of the SPI interface? I think something may be amiss here.

    The only thing that comes to mind would be this line:

    Can you make sure that you have a positive CLK edge following the last 16th falling edge? Otherwise the registers may be updating late.

  • 0 in reply to Eugenio Mejia
    Prodigy 110 points

    Hi I hope that you are still with me, something came up last week.

    Please see my screendump abouve. CH1 is data, CH 2 is SPI clock and CH3 is SPI CS

    cheers

    Michael

  • 0 in reply to Michael Laajanen
    TI__Genius 10615 points
    Michael,

    Thank you for sharing this information with me.

    It looks like you are sending 0x4FF0. This would update CH-B to a voltage value close to the reference, but it is not working for you the first time that you send it to the device. Can you confirm that the plot that you send is this specific case?

    Some of the spikes on the falling edge of SCLK line look fairly close the 0.6V threshold (page 3 of the datasheet). They might be causing false SCLK edges. If you are able to provide a cleaner digital signal it might be a good idea to try it. I am going to have to test this in the lab. I am out on a business trip the rest of this week so I will not have access to the lab until sometime next week.

    In the mean time, can you share a schematic of your circuit? I want to rule out any other possible problems.