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ADC128S022 chip select rising time

RomanS
Prodigy 20 points
Other Parts Discussed in Thread: ADC128S022

Hi,

In my design the SPI of the ADC128S022 is connected with a bus transceiver. The Problem is the chip select of the ADC is rising slowly. In the datasheet is no specification about the rising time of the chip select input. Is there any limitation?

Thanks for helping

Greeting Roman

  • 0
    TI__Genius 16890 points
    Hello Roman,

    There is no specification for the speed of the rising edge of CS. It should be ok as long as you follow the timing specifications in the datasheet. It will affect how soon you can start another operation, though. CS will need to go above VIH before you can drop CS for another operation.

    Mike
  • 0 in reply to Michael Stout
    Prodigy 20 points
    Thanks for the reply Mike

    I thought a slow rising time could be a problem because a short time both two FETs in serie (cmos) are conductive.
    To have much communication over the SPI bus or do fast ADC converting is not a requirement so it should not be a problem.

    Roman