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ADS1118: DOUT remains low when i'm reading DIN value

Part Number: ADS1118

Hi

I'm using an ADS1118 with a FPGA to read a thermistor value. The SPI interface is shared with another device (TEC). The design behavior is the next : FPGA send periodically one data to TEC and read ADS1118.

CS toogles from high to low, then after 10µs the FPGA provides clock (clock is low when cs is high) . but DOUT toogles from high to low and remains low during reading operation.

any idea ?

thanks for help

Pierre HAMMER

  • I've understood my mistake : the default mode is single shot, and my design was shifting data on falling edge of clock instead rising edge, the config was read as invalid data => config register not updated.
  • In reply to Pierre HAMMER:

    Pierre,


    I'm glad you were able to figure that one out. Using the wrong version of SPI is a common problem.

    You're probably doing this for your debug, but if you have more problems, or post more in the future, post the scope photo or output of the logic analyzer showing the interface communication. Often, we'll need that information, and can find specific problems with just the image.

    Good luck with your system. If you have any questions feel free to post back.


    Joseph Wu

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