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High Speed Data Converters
High Speed Data Converters Forum
TLC5540 with PIC18F4550
I'm going to use TLC5540 with PIC18F4550 microcontroller.
Do I need 74AC573 IC when interfacing microcontroller and ADC .
(I'm referring the application note "Interfacing the TLC5540 Analog to Digital Converter to the TMS320C203-80 DSP (APPLICATION REPORT: SLAA032)".)
for my design ???
My microcontroller can handle 5v signals. Im hope ur kind quick response.
It looks like the TLC5540 digital outputs have a typical high of 4.5V and a typical low of 0.4V. If you have a 5-V I/O uC, this should work fine. I'm not sure why they use the buffer here.
At first i need to thank for your reply.
i have another problem regarding the TLC5540 .
that is; can i give a signal to the input (analog in of TLC5540 ) straightway without any ic in between TLC5540 and analog in.
some configurations were used as below.. do i need to use below methods?... or do u have any suggestion..
I couldnt mention this in my earlier post. my analog in range is 0v to 2.28v.
i have a problem with the clock signal. Here im going to use 5MHz(i have 5MHz crystal) . for the clock circuit how can i use this crystal??
thanks in advance
If you look at page 14 of the datasheet, figure 15 shows you exactly that. The references are set to 0V and 2.28V respectively, matching your input signal. You'll need to setup your device to match the connections shown in the figure to acheive this.
Second, instead of using a 5 MHz crystal you could simply use a crystal oscillator. Its basically the same thing, but the oscillator include all the circuitry needed to make it oscillate. They also come in different output voltage values, such as 3.3V LVCMOS output. You'll likely need a 5V CMOS crystal oscillator.
at first i should thank u for the valuable thoughts.
i fount out that the input circuitry in the ADC input stage for Ac and DC coupling purposes.
as you mentioned i ll try to buy a crystal oscillator for the implementation. (before i thought to make the oscillator using 74ls04 ic. )
although i use the 5MHz here i cant get the all the ADC o/p values to the my pic.(im going to send this o/p values 12Mbps rate from the pic. so i ll mis 28Mbps).
Isn't it a problem when i have activated the ADC all the time ???
also i'm going to use two clocks for ADC (5MHz) and the pic (48MHz)...do u think there will be a problem ???
I'm not familiar with how the software will be written for the uC. You will need to tell the uC when to sample the data coming out of the ADC. I would suspect you could use the 5 MHz oscillator to do this. You cannot allow the uC and the ADC to run without some kind of synchronizing signal (like the 5 MHz reference) because there will be skew between the two which will drift over time and eventually cause errors.
I don't see a problem with running the ADC all the time.
If I use a latch ,it ll be possible to get rid of the skew problem ?
A latch will not get rid of the frequency skew problem. If you follow the method mentioned in my previous post where you use the 5-MHz clock as a trigger to the uC then you should be fine. The only concern then is making sure there is enough setup and hold time for your uC to make sure you're capturing valid data. In this case, the latch would add some delay to the data which would modify the setup and hold time, however it could also hurt you. You would need to know the initial setup and hold time to know if the latch would help. The programming of the uC could also effect the setup and hold times.
Realistically, you're running the part slow enough that you'll probably be okay without having to do anything special. I just want you to be aware of the issue in case you encounter it later on. Programming wise, you can use a for loop, or even some simple single line additions, to add some delay. A single addition would probably be all you'd need, if at all.
I have encounted a problem when drive the circuit(in PCB). without analog input ,that pins shows a voltage about 1.7v . I don't know the reason for it. i guess if it is properly working there should be the value "0v". the Schematic of the ADC in PCB is below shown. can u help me regard this. do u think is there a problem with my circuit designing or what will be the reason for showing 1.7v at the ANALOG IN? .
J4- clock i/p
J3- analog i/p
i used 5MHz for the clk.
the value at the adc o/p was (MSB)1000 0111(LSB).
If the analog input pin is left open, then it will float to some value. There are diodes on the input pin that could be biasing the input through their leakage current. Additionally, there are other circuits attached to this node that could provide the bias. Note that the node should still be high impedance and thus your driving circuit should easily overdrive this bias voltage. I'm not at all surprised that it floats at a voltage a little below VDDA/2, and it should not be a problem at all when you hook up your driving circuit.
According to the my configuration my i/p (analog in ) voltage range in 0v -2.28v . But analog in pin shows 1.7v already. what will be the effect when if I give 2v to the in put.
1.7 + 2 = 3.7 v >> 2.28v
but my actual signal is not capable of giving 2.23 v because maximum 2.28 -1.7 ~ 0.58v
I have noted in one application a schottky diode has used. (figure1)
in the data sheet another configuration has been used.. (figure2 )
do u think what will avoid the problem ? (biasing 1.7v)
how can i use the full range ? (0 ~ 2.28 v)
what are the diodes do you recommend for the figure 2 diodes ?
Again, this bias is being created by a high impedance voltage divider. If you have a low impedance source, it will easily overcome the 1.7 V bias.
Consider a voltage divider of two 1 Mohm resistors where the ends are tied to 5 V and 0 V. The divider will give us 2.5 V between the resistors. Now consider what happens when we use an input source with a low source impedance to drive this node. The low source impedance is much smaller than the impedance looking into the voltage divider. Thus we can approximate the source as an ideal voltage source. If an ideal voltage source is hooked up to a high impedance load, the node it is connected to will be equal to the voltage of the source. Thus, if the ideal source is 1 V, it will be able to drive the voltage divder to 1 V, despite the initial 2.5 V bias when no source is connected.
Consider your input source as the "ideal" source in the above example and the input to the ADC as the high impedance voltage divider.
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