I tried incorporating your questions with the answers, but I was having problems with the forum editor. So, here are just the answers:
Q4: tDOD would be the only factor. I have to investigate if we have these data.
Q5: Which comes first is random. It can be monitored through the DTM output. See page 43 for the register settings. This feature is not explained in detail in the datasheet.
Q6: This is correct, but I am investigating if there are more details we can provide.
Q7: I am investigating this one.
Q8: The VDD18 and DTM pins.
Q9 and Q10: It is best to bring them both up together, or the VDD33 first. There is no problem leaving the VDD33 powered up with no VDD18, but we would not recommend the other way around.
Q11: I am investigating.
Q12: The internal clock actually runs at 16x the INCLK. Other techniques are used to allow the 1/64 internal resolution.
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