On page 15 (figure 33) of DAC3152's Data Sheet is shown clock input configuration with ECL/PECL source. Is there a scheme that shows configuration for LVDS source.
We need to do AC coupling on receiver side of the DAC 3152. We are driving LVDS clock from Xilinx Spartan-6 XC6SLX4 device to TI DAC 3152.
A 100 ohm resistor should be placed at the receiver with AC coupling caps between it and the receiver.
So the resistor would precede the caps (if you are going from transmitter to receiver), right?
However, please refer to TI's application report titled "AC Coupling Between Differential LVPECL, LVDS, HSTL and CML signals" . Here is link to it:
On page 7, Figure 11, it is showing LVDS to LVDS AC coupling,
the 100 Ohm resistor is placed AFTER the caps. Is that right?
Let me know.
I address this question in your posting on the clock forum.
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