Is the source code of the TSW6011EVM available for customer?
The firmware of TSW6011 consists of mixed HDL which are Verilog and VHDL. We can provide compiled IP with encryption with customers and the cost is depending on the volume of demodulator (TRF3711) which is one of pair with complied IP. Then, customers can import this compiled IP to their top entity of HDL and this is agnostic to the FPGA vendor. Marketing team can guide you about this cost if you are interested in this.
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