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ADC12D1600's input power

ADC12D1600's input power

This question is answered
lei gong
Posted by lei gong
on Aug 19 2012 20:52 PM
Intellectual590 points

From the datasheet of ADC12D1600 ,I found in page 15 that "Vin+/- power : 15.3dBm (maintaining common mode voltage, a.c.-coupled)17.1 dBm (not maintaining common mode voltage, a.c.-coupled)" . In the condition that the ADC12D1600 can work normaly, how much the minimal input power?

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  • Avi Chami1
    Posted by Avi Chami1
    on Aug 20 2012 01:31 AM
    Verified Answer
    Verified by lei gong
    Mastermind7385 points

    The minimal power will be the one that will produce at least a change on the LSB. Usually you will plan your system in a way to be sure that you work to full scale range, to use all the bits of your ADC. If the input voltage is very low, you "waste" resolution of the ADC.

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  • Marjorie Plisch
    Posted by Marjorie Plisch
    on Aug 20 2012 14:53 PM
    Verified Answer
    Verified by Jim Brinkhurst84999
    Expert3070 points

    Hi Lei,

    What you found on p15 is the operating limits for the analog input.  These limits are for what maximum amount of power may be applied to the analog inputs without causing damage to the ADC.  However, 15.3dBm is significantly greater than 0dBFS.

    In order to work "normally", as you mentioned, the analog input signal should be in the range of larger than the noise floor to less than the full-scale range.  Let's tackle the full-scale range first (FSR).  The nominal FSR of these parts is 800mVpp, as may be found in the datasheet Electrical Table.  The FSR can also be adjusted {600mVpp, 1000mVpp}.  Any analog input which the ADC converts which is greater than the FSR will be converted as all 1's at the digital output. 

    Regarding the lower limit, Albert is on the right track - Alberts, thanks for your input here.  For an ADC which performance is limited by quantization noise, the minimum power should be that for one LSB.  However, these ADCs are limited by other noise sources, i.e. thermal noise.  For example the noise spectral density for the ADC12D1600 is -151.6dBFS/Hz for the DES Mode.  This implies an SNR of 56.5dB,  so the minimum signal should be greater than or equal to -56.5dBFS.

     

    Kind regards,

    Marjorie

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  • lei gong
    Posted by lei gong
    on Aug 23 2012 20:17 PM
    Intellectual590 points

    Hi Marjorie,

          Thanks for your reply .

          From the datasheet of ADC12D1600/1000RF, the chip has some kinds of signals of GND,for example GND、GND_TC、GND_DR、GND_E. But from the ADC12D1X00 Reference Board, i found these kinds of signals of GND were connected together. Do like that, cann't it result noise coupling between the analog and digital circuit  in a single ground plate design. If i connect these kinds of signals of GND through beads,will it decrease noise coupling? Which method is better?

    Kind regards,

    Lei

     

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  • Marjorie Plisch
    Posted by Marjorie Plisch
    on Aug 24 2012 16:03 PM
    Verified Answer
    Verified by lei gong
    Expert3070 points

    Hi Lei,

    The various GNDs are separate on the IC, but it is recommended to use one GND plane on the PCB to connect them.  For RF frequencies, there is less of a benefit to separating the GND planes.  Our Reference Board employs this design and shows very good performance, so that is one example.

    For details on GND and PWR plane recommendations, see the datasheet: Section 18.5 Supply/Grounding, Layout and Thermal Recommendations.  Let us know if you have further questions.

     

    Kind regards,

    Marjorie

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  • lei gong
    Posted by lei gong
    on Aug 24 2012 20:03 PM
    Intellectual590 points

    Hi Marjorie,

     I am very grateful  for your help ! Thanks again!

    Kind regards,

    Lei

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