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ADC12D1800RFRB - Wavevision 5 Commands to Acquire Data

Other Parts Discussed in Thread: WAVEVISION5, ADC08D1520, ADC08D1520RB

Hi all,

 I have a problem in WV5 acquiring data.

When pushing the "acquire data" button, what are the values of the registers that WV5 send to ADC12D1800RFRB ?

Where can I get these informations? 


Thanks in advance for your time!

HC Huang 

  • Hi Hsiang-Chao

    For details on how the Wavevision 5 software initiates a data capture please review the information at the following link: http://e2e.ti.com/support/data_converters/high_speed_data_converters/w/design_notes/1783.aspx

    The file "Programmers' Guide to WV5_DLL API r0p9.pdf" provides the details regarding the DLL commands used to enumerate, configure and capture data with a reference board.

    Support for using the DLL API is limited. However there are some additional threads on E2E on this topic that may also be useful here: http://e2e.ti.com/support/data_converters/high_speed_data_converters/f/68/p/187541/675239.aspx#675239

    and here:

    https://e2e.ti.com/support/data_converters/high_speed_data_converters/int-high_speed_data_converters/f/70/p/154748/564735.aspx

    I hope this is helpful.

    Best regards,

    Jim B

  • Hi Jim,

    Thanks for your quickly reply.

    I have another question about  the "7144.Wavevision5 DLL API Support.zip" file, is there a suitable Example Code for package "P2R1" ?

    Because the Example Code in " Programmers' Guide to WV5_DLL API r0p9.pdf " is for old version P1R2, and has no definition of "pChannelData" and "ChannelCount",  it seems not for P2R1 ?

    I wish you could provide me the Example Code for P2R1, I've worked on it for a very long time. 

    Thanks

    HC, Huang

  • Jim,

    I'm also interested in an updated example and additional instructions on using that example. Eventually, I'd like to get the wvdll.dll working with Matlab but I wanted to test out the sample code before moving on to Matlab, so I'd appreciate any additional assistance that I can get with it.

    Thanks

  • Hi Syed

    Unfortunately the information provided earlier in this thread is all the support we can offer for using the Wavevision based tools with other applications.

    Please try searching other threads on E2E as there are a number of other users that have already succeeded with this type of implementation.

    Best regards,

    Jim B

  • Hi Syed,

    I have arrived a bit late in this conversation but I have had some experience with the XML file associated with WV5. You might be able to implement some additional functionality in WV5. Depending always what your goal is.

    It seems that some sort of XAML has been employed when developing WV5, i.e, WV5 queries the board to find out which equipment you have got and then loads the necessary xml file. The XML file in a nifty way describes in a class-like manner what sort of registers the FPGA has declared in its verilog code and the associated operations (read/write) and the related op-codes. For example when you press the acquire button an op-code is sent from the PC, to the Cypress mcu and then to the FPGA which then runs whatever the op-code tells it to do.

    You can add tabs, menus, buttons and implement additional functionality by using the XML file and by observing what the rest of the XML file does. I have implemented a couple more registers in the verilog code and extended the XML file to send some values and read succesfully read them back. So far this has served my purposes.

    Best,

    Evros

  • Thanks for the response Evros. I tried your suggest but I wasn't able to determine what particular XML was being loaded for the LM97600 board. Is there a way to determine which file is being loaded ? The only file that I could find was a CPP file which seems to contain the functions for it. 

  • Hi Syed

    There are actually two different types of script files used with Wavevision5. The .xml files are used with most of the earlier boards, and a few of the more recent boards use .cpp scripts. The one for the LM97600 board is "spio5.5_xc5vsx95t_LM97600.dut.cpp".

    I have attached a programmers guide that provides some additional detail on the .cpp type scripts.

    7444.Programmers' Guide to WV5 C-Script r0p9.zip

    Hopefully the additional information in this guide will be helpful.

    Best regards,

    Jim B

  • Hi Evros,

    We haven't been able yet to access our ADC08D1520 from an application program, and I would like to know if you could provide either some explanation on how to do it or actual code. I used the code provided in the API document, but the board is not recognized (it fails the WvBoardEnum call).

    Thanks in advance,

    Julio de Melo

  • Hi Julio

    Are you able to get the Wavevision 5 GUI to recognize, configure and operate the board normally?

    I just want to make sure the basic communications with the standard software GUI are working before you spend time trying to debug the issues using the DLL.

    Regards,

    Jim B

  • Hello Julio,

    I have used MATLAB to access the provided DLL's  and have been able to successfully acquire samples with the board. You should be able to use the DLL with any framework you want though. I have used the code found in this forum and to get it to work for the 1520 I had to modify it a little bit. 

    Please bare with me for a couple of days since I do not have access to the code right now. I will provide you with a working example and details.

    Make sure your directory structure is correct; i.e., the folders with the fpga bit file and the mcu firmware.

    Regards,

    Evros

     

  • Hi Jim,

    Thanks for the reply.

    WaveVision works fine, we are able to collect data without any problems. Like others, we are trying to make data acquisition faster and automatic.

    I am using MS VisualStudio, and I am able to correctly compile the sample code that is published on pages 10-11 of the Programmer's Guide to WV5, after minor corrections. That's the only C code I could find anywhere, nothing from the forum. When I run the code below, I won't get past the enumeration call.

    ...
        WvDebugModuleSetOutputFilename("dll.txt"); // This is absolutely necessary to start the DLL 
        WvDebugModuleModifyAll(TRUE);
         if (!WvBoardEnum(&board_count, &board_names, &version_dll)) return false;
    ….

    I've seen somewhere a variation in which an explicit call for starting the DLL is executed. Am I supposed to do that or, as I am assuming, the calls above do that?

    Thanks for your help.

    Regards,

    Julio

  • Hi Evros,

    Thanks for the reply.

    I am using MS VisualStudio, but I think if I get any code that works, that would help me get into the right direction, regarding making the right calls and following the right sequence of calls.

    As I replied to Jim, I didn't find any code in the forum, so I relied on the one given as example in the Programmer's Guide to WV5. If you could provide me with either your Matlab code or a template, I can work out the details.

    Thanks for any help,

    Julio

    PS: I am also considering using the FPGA interface, but I haven't started on this yet. Any pointers on this would be greatly appreciated too.

  • Hello Julio,

    Be sure to check the DLL output file ("dll.txt") to pin-point errors. It has proved pretty helpful as I remember at some point. 

    In the initial stages I was not sure on how to proceed so I had added some functionality to the verilog code (used XIlinx ISE) and then used the wavevision script file to add some buttons and some commands. Maybe this can help you, depending on what you want to do. After I got the MATLAB code working I no longer used wavevision.

    I am not sure what you mean by FPGA interface, do you mean the API commands regarding the FPGA per se ? It is possible to modify the verilog code to do whatever you want to do - this is what I did for my project - as long as the "protocol" between the API and the FPGA is obeyed, i.e., the API sends an opcode for reading a sample, the FPGA sees it and puts it on its data lines and waits and so forth until the API has read the number of samples that you will have specified in the respective call. Don't forget that in the middle of all these lies the MCU as well. Also be careful to keep the way you send the samples the same as they are zero padded to 16-bit words to accommodate 12-bit boards as well. In short; you can do whatever but when you send the results back to the PC you need to stick on the existing way of doing it. 

    Evros

  • Hi Julio,

    I have the same problem as you. I am using VisualStudio and I am able to correctly compile the sample code that is published on the Programmers' Guide (the dll is correctly linked).

    In particular, all the function of wvdll library that I call in my code return as false, eg, if I call the function WvDebugModuleModifyAll, always it returns as false (and I don't know why).

    Probably I have some problems with the location of the configuration directory for the hardware. My code is under "C:\Users\m.giuliano\Fast ADC\SW Test\FastADC_sw_test\FastADC_test_solution" and the directory for the hardware is under "C:\Program Files\National Semiconductor\WaveVision5\hardware". I have already copied the  hardware's folder under my VS project but nothing has changed.

    How you solved your problems? How can I manage this issue?

    Thanks for your help

    Regards

    Matteo

  • Hello Julio,

    I would first like to apologise for the delay. I only hope you understand. Please see the attached scripts for interfacing the DLL with Matlab. 

     5672.1520_matlab.rar

    Do not forget to copy the whole hardware directory into the directory you will be including in the Matlab path so that the DLL will be able to load the appropriate scripts.

    I am sure if you copy the steps into your C# code or whatever you will get the same functionality.

    Evros

  • Hi Matteo,

    I was able to, finally, get the program to work with the board. After playing with a couple of calls, the board sent the samples allright.

    Now, on the quest for a fast collection of multiple records. Our intention is to acquire data as fast as possible, but as I read in this forum and I want to evaluate, it seems like we can't get faster than 5 samples/second. Did you try anything in this direction?

    Thanks for your suggestions, it really helped.

    Julio

  • Hello Julio,

    Glad you got it sorted. I once again apologise for taking too long to reply last time. 

    To answer your question, 5 acquisitions per second was pretty much the best I could do with MATLAB (see attached files in my previous post). I can do one acquisition every 0.3 seconds without the device getting too hot. May have to install a heatsink for my demo.

    It is an evaluation module after all and with the current MCU/USB controller and DRIVER/DLL combination I guess you cannot do much better than 5 acqs/sec. 

    Evros

  • Hi Evros,

    I am the one to apologize. Sorry for the delay in acknowledging your message and the receipt of your files. I was busy  trying to make my C program to work, which I finally succeeded, and was afraid of moving to a different platform in between.

    I will go over your scripts, and try to make it work with Matlab as well.

    Thanks again, and I'll give you a feedback whenever I have it working.

    Julio

  • Hi Julio,

    I wrote a C++ code with a dedicated thread to acquire the data as fast as possible (the thread was set in maximum priority and it carried out the three operation Start->Read->Stop cyclically). In this test, carried out with an internal trigger, I obtained an acquisition speed about 24 sweep/second (a single sweep was long 4KB) .

    In order to synchronize the acquisition using an external signal, I carried out some test using an external trigger and I obtained the maximum speed about 10 sweep/second (important: using the external trigger I noticed that the value of duty cycle influence the correct synchronization of the acquisition).

    Does anyone who got better results? Can someone tell me how to increase this values of speed (if it is possibile)?

    Best regards

    Matteo

  • Hi Julio, 

    I am trying to use labview installing on pc window7 to communicate adc08x1520rb. I also consider to do data acquisition in FPGA instead of calling any software running on PC to improve speed. I wonder what kind of FPGA interface you find to use for communicating with the board. Please share me some thoughts of how to start. 

    Thank you!

    Best Regards,

    Bridget

  • Hi Bridget,

    We haven't done anything yet regarding the FPGA interface. We are still searching for a board that could be connected to the adc board, so that we could have access to the FMC port.

    But we are a long way from having any results: we're used to the Altera/VHDL/Quartus/ModelSim environment, and we'll need to make a switch to the Xilinx/Verilog/ISE/Cadence(?) one.

    Other messages in this forum make references to using the FPGA source files and configuration files in trying to change some of the board behavior, but I haven't looked into them yet.

    If and whenever we have any results, I'll post in this forum.

    Julio

  • Hi Julio,

    Thank you for your reply. I appreciate it.

    May I know why you are searching for a board which is able to connect to the reference board, ADC08D1520RB. It looks like that ADC08D1520RB itself has input/output to control FMC port in its FPGA chip.

    I am working on ADC08D1520RB board and try to use LabView to control the reference board. I wonder if you have used MATLAB to communicate with the board through WinUSB drive installed on PC. If so, I wonder what interface you used to control ADC hardware? I find that USI interface supported by the reference board defines 1 input port and 4 output port defined in adc08d1520.v, but only the last 3 output ports are called in the .v file. 

    //usi spi
    input sdi_usi,
    output US,
    output sclk_usi,
    output scs1_usi,
    output scs2_usi,

    Thank you!

    -Bridget

  • Hi Bridget,

    Answering your first question, we intend to extract the samples from the AD converter through the FMC port, since the USB interface is rate-limited. As cited a couple of times here, the maximum rate is around 10 samples of 32Kbytes records per second, whereas through the FMC port we might achieve the native rate of 1.5 GSps. We hope!

    We are currently using an executable file that is called from LabView. We haven't used Matlab yet, but I think there should be no major issue in using it. Please, refer to the files provided by member Evripidis Karseras in another post for Matlab access.

    So far, we have used just the program provided in the documentation files, and we did not play with configuring the AD converter using the USI interface you mention. If we do any tests with this, I'll post it here.

    Regards,

    Julio

     

  • Hello all,

    Just to complement Julio's answer,  in the code I have it seems that you can control the ADC via a user SPI interface with the signals (check .v file, schematic and .ucf file) with:

    scs_adc, sclk_adc, sdi_adc, sdo_adc

    but that is just for sending commands to the ADC chip, not the FPGA. You need the FPGA and the Cypress MCU to send the samples over to the PC. Even when using LabView (and the wv5 DLL).

    The USI SPI signals are indeed populated on the board but internally the sdi_usi is not connected to anything:

    input sdi_usi -----> not used

    I think that finding a way to use the DLL with labview would be much easier rather than directly communicating via SPI since the effective transfer rate would be the same. If you want drastic measures do what Julio says and use the FMC port in conjunction with another evaluation board/device that works with labview.

    Edit: Of course you can use the ADC SPI to setup the ADC and then use the FMC output bypassing the FPGA/MCU as far as capture/transfer is concerned.

    Evros

  • Hi  Julio, 

    Thank you very much for your reply. 
    I wonder you let LabView call  the MATLAB file or if you re-implement the function of the MATLAB file by using LabView?
    Let me confirm what you said. 
    1) USB interface
    rate_USB = 10sample * 32*1000*8bits/second = 2.56 Mbits/second, or 2.56Msps
    2) FMC port
    rate_FMC = 1.5Gsps
    Thank you. 
    -Bridget
  • Hi Evros, 
    Thank you so much for your response. 
    Please correct me if I am wrong. So, adc08d1520.v describes interfaces to ADC, not FPGA. If so, which files are for FPGA? But if we can control ADC from LabView on PC, FPGA just use its original logic to send data to PC via Cypress MCU. In this case, why we have to control FPGA? 
    Theoretically, we can control ADC via USI_SPI output ports,  
      output US,
      output sclk_usi,
      output scs1_usi,
      output scs2_usi, 
    provided in adc08d1520.v. However, the input port, adi_usi, of USI_SPI are not called at all in adc08d1520.v. Thus, I am not sure how to use USI_SPI input to control ADC through USB from PC. 
    If we go with DLL instead of USI_SPI interface, I wonder how fast DLL would support. In the previous post, Ken Steele states that DLL is rather slow for waveform capture about 100ms each. It means 10 sps? However, we use ADC08D1520 is for achieving the sample rate of 1.5Gsps/channel. Thus, I wonder how DLL cooperate with the reference board? And why you said controlling through DLL comes with the same sample rate as with that through USI_SPI? 
    Could you please take more about if we go with FMC why we need SPI to setup ADC instead FMC itself, and how to use FMC output to bypassing FPGA/MCU since FPGA/MSU, especially FPGA logic, is indispensable for sending samples to PC. 
    Thank you!
    -Bridget
  • Hi Bridget,

    excuse my late response.

    bridget yu said:
    Hi Evros, 
    Thank you so much for your response. 
    Please correct me if I am wrong. So, adc08d1520.v describes interfaces to ADC, not FPGA. If so, which files are for FPGA? But if we can control ADC from LabView on PC, FPGA just use its original logic to send data to PC via Cypress MCU. In this case, why we have to control FPGA? 

    If you look into the datasheet of the ADC you will find out that you can control its operation manually or via a small register set accessed via SPI. The board supports both modes of operation. The Verilog file (adc08d1520.v) is responsible for controlling the ADC yes, (DLL->CYPRESS->FPGA->ADC and vice-versa). I am guessing - since I have not done so myself - that you can control the ADC using the SPI interface since the tracks on the board are  there. Then you would have to collect the samples coming out of the ADC on the FMC port somehow. If you use the DLL then you have to use the entire chain (moderators correct me if I am wrong).

    bridget yu said:
    Theoretically, we can control ADC via USI_SPI output ports,  
      output US,
      output sclk_usi,
      output scs1_usi,
      output scs2_usi, 
    provided in adc08d1520.v. However, the input port, adi_usi, of USI_SPI are not called at all in adc08d1520.v. Thus, I am not sure how to use USI_SPI input to control ADC through USB from PC. 

    I cannot answer why they were not used in the Verilog code, the board works as advertised so that's that. If you study the schematic you will notice that the tracks for those signals are implemented so you can control the ADC using the SPI interface with anything you want, bit-banging from the PC, labview, some other Evaluation module, MCU, whatever.

    bridget yu said:
    If we go with DLL instead of USI_SPI interface, I wonder how fast DLL would support. In the previous post, Ken Steele states that DLL is rather slow for waveform capture about 100ms each. It means 10 sps? However, we use ADC08D1520 is for achieving the sample rate of 1.5Gsps/channel. Thus, I wonder how DLL cooperate with the reference board? And why you said controlling through DLL comes with the same sample rate as with that through USI_SPI? 


    The DLL is quite slow but it is what it is - an evaluation module. You can roughly take 10 blocks of your signal per second, sampled at 3.2 GSPS. The DLL sends a command to the Cypress, then an opcode is sent from the Cypress to the FPGA which then stores the samples from the ADC into a FIFO. After the FIFO has filled it starts sending the samples back to the Cypress (another opcode) which then send them to the DLL on the PC which expects to read as many samples it was told to collect in a block.

    bridget yu said:
    Could you please take more about if we go with FMC why we need SPI to setup ADC instead FMC itself, and how to use FMC output to bypassing FPGA/MCU since FPGA/MSU, especially FPGA logic, is indispensable for sending samples to PC. 

    The FMC is just a pin-out of the data ports coming out of the ADC and some other signals which I do not remember. You can still see the samples coming out at the FMC port at any time but it depends what you want to do and if timing is important etc. You can initiate a sampling procedure from the DLL and then start recording samples from the FMC, but this is crude and dirty, as I said depends what you want to do with it. The ADC works all the time but you have to set its operation mode (time-interleaved or not, DDR, phase, etc look into the Datasheet) before taking any samples.


    I hope I understood your questions fully.

    Thank you!
    -Bridget

  • Thank you so much for your reply, Evripidis. I am not sure how to express my thanks. Your reply gives a big picture of design on ADC board. Sorry for getting back you late since I take some time do the investigation. I have a few follow up questions. 

    1. To control the adc08d1520rb from PC, the registers of FPGA, 0xd042 and 0xd043, need to be configured properly. I wonder where I can find the information of the two registers? I checked http://www.xilinx.com/support/documentation/data_sheets/ds112.pdf and other documents but unable to find them. 



    2. The returns of function WvBoardWriteCaptureStart is long unsigned. But how we know what are the returns consist of? For example, how we know what kind of information included in the variable, a, as following code. It looks like DLL marks the definition of all functions supported. I wonder is there any way we could see them? 

    typedef unsigned long WvBool;

    WvBool Wv_API WvBoardWriteCaptureStart(

        WvWord                    board_index,

        WvWord                    dut_index,

        /*const*/ WvCaptureSetup* ptr_capture_setup

        );

    a = WvBoardReadCaptureData(0, 0, captured_data, 4096, &data_valid);

    However, in MATLAB, we can know the returns composed by 3 info.

    [status,result1,result2]    = calllib('wvdll','WvBoardReadCaptureData',...

                                            board_index,...

                                            dut_index,...

                                            ptr1,...

                                            uint32(Samples),...

                                            ptr2);

    Thank you!
    -Bridget

  • Hello Bridget,


    1. The register set including the ones addressed as 0xD042 and 0xD043 are implemented in the verilog description of the function the FPGA is supposed to carry out. If you look in adc08d1520.v and do a search for 7'h42 you will see that this leads to a register. The D0 byte is used to decode the address lines coming from the MCU, i.e., that the data coming in from the MCU will go to this register. Unfortunately the more I say the less they will make sense unless you dig into the file I mentioned and figure out what adc_opt1, adc_opt21, adc_opt22, and adc_opt3[4:0] are set to do. Those are the adc options registers and eventually tell the device (FPGA) how to react to the data coming out of the ADC chip.

    2. If you look in this forum and on the TI high-speed blog you will find the programmer's guide for the DLL and the DLL API support. Within the latter you will find the .h files with all the definitions you will need. There is also a .chm file which might make your search a bit easier.


    Evros

  • Hi Evros, 

    Thank you very much for your reply. 

    The following is one of .v files coming with the reference board as following in blue.

    1) I wonder what is the reference number, such as 32'h0000_0017, and where can I find information about them. 

    2) why the module assign value by assign enl = ~(bit_num_d[5] ^ lmk_sync) before valid value of lmk_sync value is ready? 

    3) where I can get information about why assign value as the following way?

    assign enl = ~(bit_num_d[5] ^ lmk_sync);
    assign c = (!bit_num_d[5] && startn) && ~clk_cnt[3];
    assign d = (startn ^ bit_num_d[5]) && shift_out[~bit_num_d[4:0]];
    assign lmk_sync = !(reg_done && (bit_num_d[5] && ((&bit_num_d[2:1]) | (|bit_num_d[4:3]))));
    assign lmk_done = reg_done && bit_done;

    Thank you!

    -Bridget

    module lmk_spi
    (
    input rstn,
    input restart,

    input pclk,
    input pen,
    input pwr,
    input [4:0] paddr,
    input [15:0] pwdata,
    output [15:0] prdata,

    output d,
    output c,
    output enl,
    output lmk_sync,
    output lmk_done
    );

    wire [3:0] clk_cnt;

    reg [15:0] apb_read_data;
    wire [5:0] bit_num, bit_num_d;
    wire [3:0] reg_num;
    wire [31:0] reg_wire[0:11];
    wire bit_done, reg_done, startn;
    reg [31:0] shift_out;
    wire [31:0] data_out;

    always @(*)
    case(reg_num)
    4'h0 : shift_out = 32'h0000_0017;
    4'h1 : shift_out = 32'h0000_008d;
    4'h2 : shift_out = 32'h0000_001c;
    4'h3 : shift_out = 32'h2800_1409;
    4'h4 : shift_out = 32'h0111_ce58;
    4'h5 : shift_out = 32'h001f_3326;
    4'h6 : shift_out = 32'ha000_0005;
    4'h7 : shift_out = 32'h0000_2644;
    4'h8 : shift_out = 32'h01b0_6f03;
    4'h9 : shift_out = 32'h0400_0642;
    4'hA : shift_out = 32'h0000_0011;
    4'hB : shift_out = 32'h0028_01e0;
    default : shift_out = 32'h0000_0017;
    endcase // case(reg_num)


    // counter ( clk, done, init, thsld, clk, rstn, en, round)
    counter #(4) clk_cntr (clk_cnt, , 4'h0, 4'hf, pclk, rstn, 1'b1, 1'b1 ); //threshold 15 round 1
    counter #(6) prog_seq_bits (bit_num, bit_done, 6'h0, 6'h3f, clk_cnt[3], (rstn && (!restart)), 1'b1, (reg_num!=4'hB)); //threshold
    counter #(4) prog_seq_reg (reg_num, reg_done, 4'h0, 4'hB, clk_cnt[3], (rstn && (!restart)), bit_done, 1'b0 );

    //fass ( q, d, init, clk, rstn);
    ffas #(6) bit_num_dly (bit_num_d, bit_num, 6'h0, clk_cnt[3], rstn);
    ffas #(1) start_dly ( startn, (rstn && !restart), 1'b0, clk_cnt[3], rstn);


    assign enl = ~(bit_num_d[5] ^ lmk_sync);
    assign c = (!bit_num_d[5] && startn) && ~clk_cnt[3];
    assign d = (startn ^ bit_num_d[5]) && shift_out[~bit_num_d[4:0]];
    assign lmk_sync = !(reg_done && (bit_num_d[5] && ((&bit_num_d[2:1]) | (|bit_num_d[4:3]))));
    assign lmk_done = reg_done && bit_done;

    endmodule // lmk_spi

  • I have a question about how to repetitively capture data, after one time configuration. I am using MALTAB to do the control. After I finish one time data capture, i cannot re-call WvBoardWriteCaptureStart to capture again. However, it looks that NI WaveVision is able to consecutively do multiple capturing. Please shave me your understanding.

    Thank you!
    -Bridget
  • Hello Bridget,


    Please make sure you have set the number of samples correctly when you call the DLL functions otherwise it will hang. Also use a slight delay between each consecutive call of your loop in matlab otherwise the DLL will also hang. Use only the maximum number of samples allowed (use one of the options in the WV5 capture menu).

    Good luck,
    Evros

  • Thank you so much for your reply, Evros.

    Consecutively Capturing:

    I am working under Extended Non-DES I, dual channel mode capturing I channel data. A sine signal is fed in the I- port on the board. IThe number of samples I used in MATLAB is 16384.

    Based on the output log, I know that  TransferMaxSize = 32768, which is the sum of both I+ and I- channels, in my opinion. Correct me if I am wrong please.

    I found if I call WvBoardWriteCaptureStart,WvBoardReadCaptureData, and WvBoardWriteCaptureEnd, in a For loop, I can get consecutively capturing successfully. However, if I run my capture matlab script again to have one more capturing, WvBoardWriteCaptureStart will return an error, although all configuration parameters and spaces assigned are available in Matlab workspace. I wonder why is it. 

    WvDataFormat:

    I wonder how is the format of  data returned by WvBoardReadCaptureData affected by the setting on WvDataFormat? WvDataFormat has 3 options as following. I tried all 3 format separately, but the data returned by WvBoardReadCaptureData remains integer. I did not see any format change. Please enlighten me about it. 

    /** Data format for the sampled data. */

    typedef enum {

       /** Binary */

       WvBinaryFormat = 0x1000000,

       /** Binary offset */

       WvOffsetBinaryFormat,

       /** Two's complement */

       WvTwosComplementFormat

    } WvDataFormat;

    Thank you very much!

    Bridget

  • Hi Bridget,

    Make sure you close the board and then the dll from matlab before clearing everything. In short, clear everything before running your script again.

    [status] = calllib('wvdll','WvBoardClose',0);

    [status] = calllib('wvdll','WvShutdown');

    unloadlibrary('wvdll');

    The format you mention has to do with the representation of the samples in binary format. I cannot elaborate about numerical formats here, please look it up in wikipedia or elsewhere. It has nothing to do with your problem, I can assure you that.

    Evros

  • Thank you very much, Evros!
  • Hi Evros,

    I have two question and hope you could share your thoughts with me. 

     

    1. How to set for Non-DES I and Q mode? 

    As we knew that the reference board supports 5 possible modes of operation selectable as following.

      • • NonDES I ch – Dual channel mode capturing and viewing the I-channel data
      • • NonDES Q ch – Dual channel mode capturing and viewing the Q-channel data
      • • NonDES I and Q – Dual channel mode capturing and viewing both the I- and Q-channel data
      • • DESI Mode – Double Edge Sample (interleaved) mode with I input
      • • DESQ Mode – Double Edge Sample (interleaved) mode with Q input

    Please confirm my understanding: 

    When I set DEN=0 and IS=0, it is Non-DES I ch 

    When I set DEN=1 and IS=1, it is Non-DES Q ch, 

    If the above-mentioned is true, how to set for Non-DES I and Q mode? 

    2. How to set to enable two signal  inputs instead of one ? 

    I set DEN=0 and IS=0, and suppose it works on Non-DES I ch mode. When i only feed signal source into I+ port of the reference board, I observed that the current frequency is around 3Gsps. However, the board is set at dual channel mode, as Non-DES I, the sampling rate should be around 1.5Gsps, why? 

    On the same mode and setting, if I feed 2 signals into both of I+ and I- port, I receive error that DUT clock not detected by the firmware, when WvBoardReadCaptureData is called. 

    15/02/05:01:13:14.0150:CAPTURE:Sending CMD_ID_CAPTURE_START with modifier:2

    15/02/05:01:13:14.0153:GEN:DUT clock not detected by the firmware

    15/02/05:01:13:14.0153:CMD:return:DLL_COMMAND_RET_ERROR_DUT_CLOCK_FREQ_INVALID

    15/02/05:01:13:14.0153:CMD_API:Ack received.  Releasing API.

    15/02/05:01:13:14.0153:CMD_API:==== Command complete     ====

    Thank you!

    -Bridget

  • Hi Evros, 

    I have figured the problem. Thank you. 

    -Bridget

  • Bridget,


    It is good that you have solved your problem.


    Remember that this is a forum and others might be interested in the solution as well since it is public and not just between two parties.

    If you are kind enough to post the solution to your particular problem then it will be beneficial for others reading in the future.

    Regards,

    Evros.

  • Hi Evros,

    I wonder if I can use 7'h39 and 7'h3b to output more information from FPGA via Cypress?

    How could I know the protocol between FPGA and Cypress? just following Cypress's read multiplexer in verilog would be all?

    How could I make sure DLL recognize data recognize data from 7'h39 and 7'h3b?

    Thank you very much!

    -Bridget
  • Hi Evros, 

    Just see your reply. 
    Sure. I am happy to share my understanding here. To better benefit people using the same products,  I will write my question  and summary in details. 
    Before summarizing my understanding of enable ADC08D1520 chip on different mode, I would like to confirm a few points. Anyone who sure about these questions please feel free to share your thoughts with me. Thanks in advance. 
    The data sheet states that:  "If pin 52 (DRST_SEL: whether DCLK is reset using a single ended or differential signal) is floating or at logic high and pin 41(ECE:Extended Control Enable) is floating, this pin can be used to set the full-scale-range or can be used as an alternate Extended Control Mode enable pin. )".
    My questions: 
    1. How to set to make sure floating format on pin 52 and pin 41? We only set the pin as either 1 or 0. How does the data format matter? 
     
    2. It looks like that FSR could be used to enable an alternative ECE mode. What will happen if I set ECE=0, but have FSR to enable ECE? What is the most straightforward way to set ECE? Does that mean as long as we write ADC registers we are already working on ECE mode? 
    3. What if happen if we set IS=1 to enable data capture on I channel, but we set IQ_CAPT =1 in FPGA to enable capture on both I and Q channel? We FPGA register setting are output to Cypress. If so, how it affects behavior of ADC chip? 
     
    4. If we have data captured on both of I and Q channel, it looks we need to have two pairs of  WvBoardWriteCaptureStart and WvBoardReadCaptureData, respectively for I and for Q, correct? Could ChannelDataIndex be used to differentiate data of I channel from that of Q channel? How we set channel index to identify each channel in matlab? 
     

    req = struct( 'DACFreq', uint32(0),...
                  'TransferSize', uint32(Samples),...
                  'ChannelDataIndex', channel_index,...
                  'HistogramEnable', uint32(0),...
                  'HistogramMaxBin', uint32(1), ...
                  'DataFormat', uint32(Data_Format), ...
                  'tot_num_acqs', uint32(Samples),...
                  'num_bufs_used', uint32(1), ...
                  'num_acqs_per_buf', uint32(Samples),...
                  'num_bufs_per_set', uint32(1),...
                  'MultiplexedChannelIndex', uint32(0) );

    [status,result1] = calllib('wvdll','WvBoardWriteCaptureStart',board_index,dut_nidex,req);

    data_received = zeros(1,Samples);
    ptr1 = libpointer('uint32Ptr',data_received);
    ptr2 = libpointer('uint32Ptr',uint32(0));
    [status,result1,result2] = calllib('wvdll',
                                       'WvBoardReadCaptureData',...
                                        board_index,...
                                        dut_index,...
                                        ptr1,... % return_data,
                                        uint32(Samples),... % sizeof_data_allocated_by_caller,
                                        ptr2); % return_data_valid



     
    5. What is difference between DDR and DES? It looks both are in double edge mode. Are they the same? 
    Based on the confirmation, I will do experience to confirm the conclusion and summarize by posting here. 
    Thanks. 
    -Bridget