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multi-DAC synchronization procedure ¿ DAC5681Z for beamforming application ?

Other Parts Discussed in Thread: DAC5681Z, DAC3484, DAC3482, DAC37J82

Hello!,

I am using 4 DAC5681Z for a beamforming application (we need 250Msps). I have read about the 'recommended multi-dac synchronization prodcedure" explained in the datasheet (page 40). At the end of the synchronization procedure it is said that :

"all outputs of all DACs will be synchronized to within +/-1 DAC clock cycle".

This period of time is too much for our application..

I have two questions about this issue:

1. What DAC clock period is datasheet refering to ? I mean, Is it  the period of CLKIN (sample frequency without interpolation) or the period of digital data after interpolation (x2/x4)?

2. There is a way to reduce this delay between these DAC's ? I'm not an expert on DACs, but I have read that standard JESD204B  is better for these issues (multiDAC synchronization), perhaps we would use other DAC with this type of interface.

many thanks!!

  • Hi Adrian,

    The DAC clock period is referring to the final DAC update rate (input data rate * interpolation). You will not be able to guarantee synchronization within more than +/-1 DAC clock cycle. The issue is between the handoff of the SYNC signal from the data clock domain to the DAC clock domain (across the input FIFO) because the phase between the input clock and output clock are not deterministic.

    If you need tighter synchronization then there may be a better DAC for you. Have you looked at the DAC3482 / DAC3484 family? These DACs can be synchronized perfectly by implementing a dual SYNC architecture. The DAC37J82 may also be a good choice which uses the new JESD204B interface.

    Regards,
    Matt Guibord

  • Hi Matt, 

    many thanks for your response, I have read  datasheets for DAC3482, it is possible to bypass the complex mixer and QMC in order to process each channel independently ?

    thanks!

    regards

    Adrián

  • Hi Adrian,

    Yes, this is absolutely possible. And the interpolation filters can be bypassed as well. You'll need to use "Dual SYNC Sources Mode" to achieve precise synchronization between parts. If you only need 4 outputs than the quad DAC3484 may be sufficient. Since you have independent signals, the isolation between channels may be a concern. In that case two DAC3482's may be a better choice.

    The app note below talks about synchronization of the DAC348x family.

    http://www.ti.com/lit/pdf/slaa584

    Regards,

    Matt Guibord

  • Hi Matt,

    In the other hand, with ADC's we need synchronization too. I have read AP "snaa073f.pdf" where AutoSync feature is explained. I have read that the main purpose of AutoSync is to synchronize data clock between several DACs towards FPGA/ASICs.

    Then, should I only take in account the synchronization between data clocks ?

    Can I suppose that if sample clock arrives at the same time to several DACs, the signals will be sampled exactly at same time in all DACs ?

    Many thanks,

    regards,

    Adrián

  • Hi Adrian,

    You mention "DAC" multiple times in this post, but you're referencing a feature found in some of our high-speed ADCs so I'll assume "DAC" is a typo. I believe the purpose of autosync in the ADCs is to align data and data clocks so that synchronization can be achieved. I believe this feature assumes that the sample clocks for all ADCs are phase aligned, so you would need to make sure that synchronization between sample clocks is achieved.

    If you have detailed questions about autosync, please post a new thread mentioning the part number that you're interested in.

    Regards,
    Matt Guibord

  • Hi Matt,

    Many thanks for all, I will post a new thread about this.

    kind regards,

    Adrián