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ADS42JB69EVM: SPI Control via FMC Connector

Other Parts Discussed in Thread: ADS42JB69EVM, ADS42JB69

We are attempting to use a TI ADS42JB69EVM module via the FMC connector to a HPC
FMC connector on a Xilinx Zynq SOC-based development kit (specifically, the Avnet
Mini-ITX Development System).  One thing we are interested in testing with this
setup is the ability of our Zynq-based application to configure the ADS42JB69
device over the SPI Interface.

Table 1 of the User Guide identifies SJP4-SJP11 for selecting between the FMC and USB
for the SPI connection.  However, there are 8 lines for the SPI interface, where true
SPI only requires 4 (SCLK, MOSI, MISO, SS).  In addition, these signals appear to be
routed through a CPLD device on the ADS42JB69EVM per the schematic.

Besides the identification of the SJP locations, the remainder of the User's Guide
focuses strictly on how to use the GUI to configure the ADS42JB69, something we want
to do via our software and the SPI to emulate our final design.

I therefore need to know the following:

1.  How do SPI_D0-SPI_D7 correspond to SCLK, MOSI, MISO, and SS?
2.  Are SPI_D0-SPI_D7 setup as differential pairs?  If so, which lines are paired
    together?  Also, what would be the recommended differential protocol (LVPECL, LVDS)?
3.  How should we jumper JSP4-JSP11 to use the FMC connections?  A simple solder jump, or
    is there a recommended in-line resistance to add?

Any additional help you can provide in setting up this ability would be greatly appreciated.