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About ADC08D1020 Power up sequence

chao zh
Intellectual 650 points
Other Parts Discussed in Thread: ADC08D1020

Hi,all

I have confused about power up sequence about ADC08D1020.

The datasheet said "Be sure that the supplies to circuits driving any of the input pins, analog or digital, do not come up any faster than does the voltage at the ADC08D1020 power pins."

But in the EVM board,the ADC IO supply(1v8io)  and the FPGA supply  power up early than the ADC supply(1v9). 

I want to know which is the right sequence and can anyone give me more information about the power up of ADC08D1020,especially ADC08D1020 and its peripherals(like FPGA).

Thank you

  • 0
    TI__Mastermind 43930 points

    Hello

    Ideally any I/O signals from the FPGA to ADC should not be active until the ADC power is applied. In the ADC08D1520EVM the FPGA power supplies are enabled approximately 30ms prior to the ADC supplies being enabled. However the FPGA LVCMOS outputs to the ADC will not be active until the FPGA is configured which will occur quite some time later. This prevents the signals from the FPGA from driving the ADC inputs before it is powered up.

    If you are desiging a new system you should do one of the following:

    1. Enable the ADC power first and then the circuitry driving the ADC inputs.
    2. The signals driving the ADC are enabled after the ADC power is active.

    Regards,

    Jim B

  • 0 in reply to Jim Brinkhurst1
    Intellectual 650 points

    Thank you very much for your relay.