Hi. I am using TLC5540I in our application. We have 12 ADC channels which are connected to virtex-6 FPGA through level translators(TXB0108).See the below block diagram of our application (shown only two channels)
I have following queries
1)Can I use TXB0108 device to level translate signals between ADC to FPGA?
2) Can I use same TXB0108 for CLK signal also?Let us know what is jitter and other parameters need to take care for ADC CLK?
3) Our application is required to maintain skew between channels,what is the device to device skew of TXB0108 and TLC5540I?
4) Our design required reference voltage of 3.2V. I used external 289 ohms resistor to generate the same.Is that correct way to generate?
Thanks
Srilakshmi