• State
  • Locked Locked
  • Replies 3 replies
  • Subscribers 46 subscribers
  • Views 416 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Automating Sync Req command on LM97600RB

Syed Abrar Ul Huq
Intellectual 315 points

Hi,

I'm using the LM97600RB and I wish to automate the signal capture process based on a trigger so that the board keeps capturing data without having to initiate the capture from WaveVision. However, some of the functions such as the Sync Req have to be performed on WaveVision before we can acquire the data. Wouldn't it be possible to ensure that the FPGA does this on initialization rather than having us to perform this to ensure that the correct data is being captured ?

  • 0
    TI__Mastermind 43910 points

    Hi Syed

    Much of the Sync Req functionality is accomplished using control functions in the .cpp script file working with several FPGA firmware features. Data capture in this board is initiated by the script sending a particular control request (or set of requests) to the FPGA.

    It might be possible to update the overall design to achieve what you are looking for, but at the current time we have no plans to make any modifications to the FPGA firmware or script for that board. The LM97600RB is provided as a convenient platform to evaluate the LM97600 device performance and features, and we believe it is adequate for that purpose.

    Best regards,

    Jim B

     

  • 0 in reply to Jim Brinkhurst1
    Intellectual 315 points

    Understood.

    I have another question regarding the calibration of the LM97600 with using the CAL pin for automatic and on-command calibration. Does the LM97600RB perform the on-command calibration just on asserting the bit 15 of the Configuration Register 2 ? (i.e the CAL pin high for a minimum of 80 input clock cycles after it has been low for a minimum of 80 input clock cycles) Or do we have to perform the above operation in addition to asserting the bit 15 in the Configuration Register 2.

    In our design, rather than connect the power through the switch as in the Evaluation board, we've connected the CAL pin with an output pin of the FPGA so I don't believe the LM97600 would be calibrated in our design on power-up. 

    -Syed

  • 0 in reply to Syed Abrar Ul Huq
    TI__Mastermind 43910 points

    Hi Syed

    These devices are calibrated when the logical OR of the CALpin input and the CALregister bit is first low for a minimum of Tcal_l clock cycles and then is high for a minimum of Tcal_h clock cycles.

    Therefore it is possible to perform an on-command calibration of the device using the CAL pin input alone. Just ensure that the internal CAL register bit is always set to 0 and then the pin will perform the desired function.

    A Power-On Calibration will be performed as long as the CAL pin is in the logic low state during the ADC power-up calibration delay period (Power-On calibration delay is 8,388,608 CLK cycles).

    Let me know if you have any other questions.

    Regards,

    Jim B