ADC08D1520QML-SP Power Consumption

Jim,

Thank you again for the information. Another question I had, and just to confirm as this has come up before, is it possible to toggle the ADC ON and OFF (put in sleep mode) to save power? From the specification sheet, the calibration time for a 250 MHz input clock (and our sample rate) is about 6.4 ms.

Thanks,

Peter

Hi Peter

(Note: I'm the expert on the commercial version of the ADC08D1520. The space version expert may have additional comments regarding PD and Calibration issues specific to that version that I'm not aware of).

You can use the PD function to power-down the ADC and reduce power consumption.

However, if the device is powered down for a long time, the die temperature will drop from the previous steady state temperature where the calibration was done. When first powered up, the device performance (linearity, SNR, SFDR) will be reduced until the die temperature returns to a similar steady state temperature. Therefore, in this situation, if optimum performance is needed soon after power-up it would be best to perform a calibration at that time and then do another calibration when the device temperature stabilizes.

Best regards,

Jim B

Jim,
In regards to the ADC08D1520QML-SP clock inputs, might you have any suggestions as to a LVDS quartz oscillator or clock generator that supports a 250-300 MHz rate? There is a dearth of space qualified oscillator/clock generator parts that have the ability to drive at LVDS levels, and at the higher rates. It seems one would have to use a CMOS/TTL-to-LVDS converter, such as TI SN55LVDS31, to accommodate the 3.3V PECL input and then translate to LVDS levels. However, the TI SN55LVDS31 is limited to 200 MHz. What is the reason behind the 200 MHz limitation?

Thanks,

Peter

Peter,
Have you seen the THS4511-SP or THS4513-SP, space grade differetial output amplifiers?

Kirby,
I am not sure I am following your line of thought, but I was hoping to utilize a driver to achieve fanout, hence the quad device.

Peter