Can I interleave or sequence 100Msps ADCs to achieve Gsps sampling rate

Hi,

Well, yes you could do what you suggest but the performance would likely be terrible without fine tuning the setup.   People *have* been using tinterleaving for years to implement higher sample rates than can be had with currently available ADCs, but they also have to do *something* to fix the distortions that arise because of mismatches between the individual ADCs.   Additionally, some of the faster ADCs on the market may already be interleaved internally, such as the ADS5402. 

For years, if the fastest ADC we offered was 500Msps, then there would be customers that would use it to achieve 1000Msps or 2000Msps.  Then when we offer 1000Msps, there would be customers that would use it to achieve 2000 or 4000Msps.  But always the challenge is to match the gain, offset, and phase across all the ADCs and the method used to do that has often been the 'secret sauce' that a customer uses to try to make their product stand out.   

There are even EVMs available through the TI e-store for interleaved ADCs on an EVM, such as two 400Msps ADCs used to achieve 800Msps http://www.ti.com/tool/ADS5474ADX-EVM?keyMatch=ads5474adx-evm&tisearch=Search-EN-Everything or four 550Msps ADCs used to achieve 2200Msps http://www.ti.com/tool/ADS54RF63-ADX4?keyMatch=ads54rf63-adx4&tisearch=Search-EN-Everything.   For these two interleaved EVM examples, the logic to 'fix' the mismatches due to gain, offset or phase mismatches is implemented in the FPGA on the EVM, and is the intellectual property of SPDevices and that intellectual property is the product that they wish to sell or license. 

Our ADS5400 1000Msps ADC even has internal registers accessible through the 3-pin SPI port to fine tune the gain or offset of the ADC or to fine-tune the sampling instant.  This was done to make the ADS5400 more useful for interleaving applications, but the challenge still remains as to how to detect and quantify the mismatches and know which way to move the fine-tuning registers.

In short, I think you would be better served by choosing an ADC that can support your desired sample rate up front, and only bite off on the difficulties encountered by interleaving if you cannot find an ADC to support that rate directly.  I am trying to attach a short ppt file that illustrates the mismatches you will face, but the forum is not allowing me to do that at the moment.

Regards,

Richard P.