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continuous data capture with ADC12J4000 + TSW14J56?

user4504373
Prodigy 20 points
Other Parts Discussed in Thread: ADC12J4000

Hello,

I am designing an UWB radio receiver which has a high speed adc at the end. The signal from the receiver includes pulses with width of ~3ns and I need to convert that signal to binary code using a recognition algorithm so that every pulse indicates 1 and no pulse indicates 0. I am considering using a combination of ADC12J4000 + TSW14J56 and HSDC Pro GUI. I have no experience in working with ADCs so I have a few questions:

1. The problem is that by reading the user guides I understood that I cannot implement an recognition algorithm with the HSDC Pro? Or is there a way to do that by using some back channel communication from HSDC to some other program? The HSDC is just for monitoring and saving the converted signal(?) but my application requires doing the conversion to binary code continuosly.

2. Or can I use some other GUI than the HSDC Pro?

3. I also found some other data capture boards (xilinx kintex-7 family?) to replace the TSW14J56 (and therefore the HSDC Pro) with but I'm not sure if they are capable of functioning in an application as fast as this one.

I'm not a native english speaker so I'm sorry for the typos and possibly unclear questions :)


Best regards,

Ismo

  • 0
    TI__Mastermind 43920 points

    Hi Ismo

    1. That is correct. The HSDC Pro firmware and software can only store a block of data, and then process it in the GUI. It cannot continuously receive data and process it with any algorithms.

    2. No, the firmware in the TSW14J56EVM is only designed to do block captures.

    3. There are 2 main alternatives:

    a) With the existing TSW14J56EVM capture board you can modify the firmware, adding the needed continuous capture and processing features, along with whatever pulse detection algorithm you come up with. This will require the Altera FPGA development tools and the JESD204B IP license.

    b) Use a Xilinx FMC carrier board that has the needed number of JESD204B lanes and modify the firmware to support your needs. For more information on compatible boards please see the TI TSW14J10EVM product folder. This will require the Xilinx FPGA development tools and the JESD204B license.

    In either of these cases you should contact the FPGA vendor regarding access to their tools and IP. Source code for the FPGA designs associated with the TSW14J56EVM and TSW14J10EVM are available for download from their respective product folders.

    Best regards,

    Jim B

  • 0 in reply to Jim Brinkhurst1
    Prodigy 20 points
    Hello Jim,
    Thank you for the fast reply.

    I decided that livestreaming 4GSPS adc data to computer would demand too much from the computer hardware. I was thinking that I could program the FPGA to recognize the pulses and only send information of them to the computer, this should solve the problem and be possible with the FPGA. I requested the firmware file last week, hope it arrives soon :)

    br,
    Ismo
  • 0 in reply to user4504373
    TI__Mastermind 43920 points

    Hi Ismo

    I agree, doing the data processing in the FPGA is the best approach.

    Good luck with your project.

    Regards,

    Jim B