• State
  • Locked Locked
  • Replies 2 replies
  • Subscribers 46 subscribers
  • Views 352 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Providing clock to ADS 6129

Ashwini Deshpande
Prodigy 90 points
Other Parts Discussed in Thread: ADS6129

Hi,


We want to design High Speed ADC board, and we have chosen ADS 6129 device for our design. ADC is configured by Altera FPGA (serial configuration). I wanted to know if it is recommended to provide 250 MHz clock to ADC from FPGA or we need to use external clock source. Pls guide.

Thanks,

Ashwini

  • 0
    TI__Mastermind 29220 points

    Hi,

    Physically, you could supply the clock to the ADC from an FPGA but I do not think you would want to.  The ADS6129 is capable of a signal to noise ratio (SNR) of over 70 dBFS, depending on the frequency of the analog input.  To preserve this level of performance would require a very clean *low-jitter* sample clock.  I have not seen an FPGA be capable of generating a clock with low enough jitter to be suitable for clocking the ADC. 

    There is furtner information on the TI web sites about jitter and clocking for ADCs.

    There is a spreadsheet available that would calculate your expected SNR given parameters such as the rms jitter on the external clock, the aperture jitter for the ADC in question as taken from the datasheet, and frequency of the analog input.  Getting a good reading of the jitter of the clock in question is perhaps the hardest part of the exercise though.  But the calculation could be used to see how much jitter can be allowed on the clock for a desired level of performance and then the clocking solution can be designed with that requirement in mind.  The SNR calculation tool may be found at:

    http://www.ti.com/tool/jitter-snr-calc?keyMatch=clock jitter snr&tisearch=Search-EN-Everything

    Also, a short video on the effect of jitter on SNR may be found at:

    https://training.ti.com/understanding-clock-jitter-impact-adc-snr?keyMatch=clock jitter snr&tisearch=Search-EN-Everything

     

    Regards,

    Richard P.

     

  • 0 in reply to Richard Prentice
    Prodigy 90 points

    Thank You very much for the help.

    links are very useful.

    Regards,

    Ashwini