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DAC37J82 one input lane and two outputs?

Jan-Philip
Prodigy 20 points
Other Parts Discussed in Thread: DAC37J82

Hello,

I have got one questions about the DAC37J82 which we consider to use. On page 31 of the datasheet and the last row of the table it is written that one could use one lane to control the two internal DACs. So just to be sure: I could connect one JESD204 input lane of this device with one GTX transmitter of a Xilinx Virtex 7 FPGA to control two DAC outputs independently?


Thank you so much and best regards

Jan-Philip

  • 0
    TI__Guru 66104 points
    Jan-Philip,

    Yes, this is the "124" mode, which utilizes on serialized JESD204B lane to provide data to two DACs on the chip. The number of RX lanes is reduced at the expense of higher serialized data rate.

    The frame assembly is shown on page 29.

    -Kang