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Matching length of LVDS lines on the ADS4149 and DAC5675A data converters

Other Parts Discussed in Thread: ADS4149, DAC5675A

Hi,

We are currently designing a board that will use ADS4149 and DAC5675A high speed data converters with a 200 MHz sample rate. We are know designing the layout of the board, but we are encountering technical problems that prevent us to match the length of the LVDS pairs. The 2 signals of one pair have the same length, but 2 different pairs don't have the same length. For instance the longest  DAC LVDS pair is 11mm longer that the shortest one. Is it problem ? How close the LVDS pair length should be matched ? We weren't able to find information about the layout of these high-speed converters, is there any literature on the subject ?

Regards,

Maxime Puech

  • Hi Maxime,

    I would suggest you measure/calculate the skew between shortest pair LVDS pair and the longest LVDS and then make sure even with this skew you are meeting minimum setup and hold timing requirements for the DAC5675A. if you fulfill this criteria I think you should be fine.

    Regards,
    Neeraj Gill
  • Hi Neeraj,


    Thank you for your answer. The thing is I can't measure skew since the board is not designed yet, and I have no idea how to calculate it. Don't you have a global recommendation for pair length matching for these component ? Or is there an application note that would explain skew calculation ?

    Regards,

    Maxime Puech.

  • Maxime,

    A typical delay for a pcb is ~ 154ps/inch. Use this information, along with the data sheet specs for clock to output, and setup and hold times for the two devices mentioned above along with the device you plan on using to capture the data and provide data with to determine how much skew you can have between pairs. If you have a simulation tool, this could also provide you with a typical delay based on the pcb material and stackup used.

    Regards,

    Jim

  • Hi Jim,

    Thank  you for your feedback. With your estimation I have about 61 ps skew between the longest pair and the shortest. The minimum setup time for the DAC5675A being 1.5 ns, the holding time being 0 ns, and the clock period being 5 ns I guess I should be OK.

    Regards,

    Maxime Puech.