Hi,
I am trying to characterize DAC3482 output phase noise per TI application notes on clock noise effect on DAC output: document # slaa566
My setup is the same as the setup in the paper shown in the picture below.
I am program TSW1400 to output 450MHz signal, DAC3482 has interpolation of 1 and NCO is bypassed.
Per paper, the phase noise of DAC output should be related to DACCLK phase noise by 20Log(DACfreq/DACCLKfreq), plus some intrinsic noise of the DAC.
I scaled my DACCLK phase noise to be same as DAC output frequency of 450MHz, so I expect these two phase noise identical, provided if intrinsic noise of the DAC is small. In close offset freq and far out offset frequency, this is indeed the case. However, in the middle range from 100Hz to 50kHz offset, the DAC output phase noise degraded by 10-15 dB compare to that of the DACCLK phase noise.
Since I am not use any NCO, or internal PLL of the DAC3482, or the PLL of the CDCE62005, I am not sure where could be the source that causes this phase noise degradation in the middle region. Could someone from TI provide me some clue as what may makes the phase noise in the middle offset freq degraded? A phase noise plot is shown below
Thanks!