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DAC3482 Phase Noise versus DACCLK Phase Noise

Other Parts Discussed in Thread: DAC3482, CDCE62005

Hi,

I am trying to characterize DAC3482 output phase noise per TI application notes on clock noise effect on DAC output: document # slaa566

My setup is the same as the setup in the paper shown in the  picture below.

I am program TSW1400 to output 450MHz signal, DAC3482 has interpolation of 1 and NCO is bypassed. 

Per paper, the phase noise of DAC output should be related to DACCLK phase noise by 20Log(DACfreq/DACCLKfreq), plus some intrinsic noise of the DAC. 

I scaled my DACCLK phase noise to be same as DAC output frequency of 450MHz, so I expect these two phase noise identical, provided if intrinsic noise of the DAC is small. In close offset freq and far out offset frequency, this is indeed the case. However,  in the middle range from 100Hz to 50kHz offset, the DAC output phase noise degraded by 10-15 dB compare to that of the DACCLK phase noise.

Since I am not use any NCO, or internal PLL of the DAC3482, or the PLL of the CDCE62005, I am not sure where could be the source that causes this phase noise degradation in the middle region. Could someone from TI provide me some clue as what may makes the phase noise in the middle offset freq degraded? A phase noise plot is shown below  

Thanks!

  • Florence,

    Please advise if you are testing the DAC3482 on the EVM (which revision?) or you own PCB hardware. Another contributing factor with the DAC3482 output phase noise is the CLKVDD power supply noise. Any noise on the CLKVDD power supply will be modulated onto the DAC output.

    For some of the critical characterization of the DAC3482 phase noise, we would disconnect the on-board LDO and connect external, high quality, analog power supply (HP6216A). This will minimize the overall phase noise. Some of the newer, digital switching bench power supply may contribute switching noise so not all bench power supplies are created the same.

    You may refer to the datasheet, section 9 for detail of CLKVDD noise contribution mechanism

    Some of the newer LDO from TI also helped minimize the phase noise. Unfortunately, they weren't available when the DAC3482 EVM was build.
    -Kang
  • Kang,

    Thanks for you input. I am using TI EVM for these measurement .

    I'd like to confirm, you recommendation is to by pass U11, provide an external low noise voltage as the 3.3V_LDO_IN ?

    Wondering if TI has characterized the signal phase noise using the EVM, with on board LDO regulator

    Thanks,

    Florence

  • Hi Florence,

    You may refer to the attached report with CLKVDD powered by high quality bench power supply vs. digital power supply. In this case, the 1.2VCLK node is disconnected from on-board LDO with external clkvdd supply connected. (i.e. on the DAC3482 EVM rev G, you can remove FB39 and connected external power supply to TP25).

    This will allow you to see the inherent DAC phase noise better. (Note, I have not excluded the inherent DACCLK phase noise in the measurement.)

    DAC34H84 Phase Noise vs Power Supply Noise .ppt

  • Thanks Kang! I was able to duplicate the result of improved phase noise using HP6216A power supply