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How to perform external Triggering in TSW1400 and provide same external reference clock of 10 MHz to TSW30SH84 EVM and TSW1266 EVM

Other Parts Discussed in Thread: LMK04808, TSW30SH84EVM

I am facing following problems while working with TSW1400, TSW30SH84  and TSW1266 EVM.


1)     I have Connected SMA cable from SYNC4 J17 on the Master TSW1400 EVM to the EXT_TRIG_INPUT J11 Slave TSW1400 EVM. When I have selected "Trigger mode enable” in Master TSW1400 EVM. Also both "Trigger mode enable" and "Arm on next capture button press" is selected in Slave TSW 1400 EVM. Then it is showing “No Trigger Occurred” at Slave TSW 1400.

But External Trigger is occurring when I have not selected "Trigger mode enable” in Master TSW1400 EVM. Also both "Trigger mode enable" and "Arm on next capture button press"  is selected in Slave TSW 1400 EVM.  

Why trigger is occurring at Slave TSW 1400 when Trigger mode is not enabled in Master TSW1400 from SYNC4 J17 only? Also there is no trigger out from  SYNC1 J14, SYNC2 J15 and SYNC3 J16 in this configuration.

Why there is no trigger out from  any of the SYNC4 J17, SYNC1 J14, SYNC2 J15 and SYNC3 J16 when Trigger mode is enabled in Master TSW1400? 

Is there any issue in hardware or software?

2)     How to provide same external reference clock of 10 MHz to TSW30SH84 EVM and TSW1266 EVM? How to check whether both are locked with same external reference clock. Please provide the configuration needed in both TSW30SH84 EVM and TSW1266 EVM.

  • Girish,

    Are you trying to trigger a TSW1400+TSW30SH84 and a TSW1400+TSW1266 together?

    In general the triggering modes are used for a single EVM in an event based mode (trigger in or trigger out) or synchronizing multiple DAC or ADC.

    I do not believe we have documented how to perform a DAC master and ADC slave mode.  Is this what you are trying to achieve?

    Ken

  • Hi Ken,

    Sorry for the confusion. I discussed with my supervisor and I am re-framing the problem statement here:

    1. As per your document, when we are putting external trigger ON in GUI, no trigger (i guess it should should look like strobe/impulse) appears in any of the 'sync port'. However, when we toggle the tab "external trigger" to OFF in the GUI, surprisingly a trigger is coming in sync-4. However other sync ports have still no trigger signal. I guess, it should be opposite as well as when trigger tab in put -ON, one should see trigger signal at all four sync ports (SMA connectors) in the board. Is this a GUI issue or hardware issue in your opinion?

    2. We have two EVM's: EVM#1: TSW1400+TSW30SH84 and a EVM#2: TSW1400+TSW1266. Our purpose is to use the trigger signal generated by DAC in EVM#1 as marker (by connecting to external trigger in EVM#2)  for the ADC in EVM#2. 

    3. The overall aim is to synchronize clocks of two EVMs using trigger signal for Digital predistortion application. 

    Please advice.

  • Kindly reply
    We are trying but we are struck from many days.
  • IMPORTANT and URGENT ISSUE: Also one more issue in case of 10 MHz external reference with LMK04808_614p4M_Dual_Loop_10M_Ref.txt setting file selected, the LED D1 on the TSW1266 is OFF (not lit). This is opposite to the application notes of TSW1266 GUI (Application note SLAU484, page 10). In such case
    How do we know that our hardware is accepted 10 MHz reference. Again, is this indicating hardware issue?
  • Girish,

    There was a long ThanksGiving holiday in the US and we have only just returned today. I have asked a collegaue who understands the TSW1266 better to help look into those issues. I will try to work out your TSW1400 issues.

    Ken.
  • Hi,

    I have not used the 10MHz syncing input with the TSW1266, but the clocking on that EVM is shared with the TSW1265 and the 10MHz syncing was used with that EVM.  There are two configuration files that come with the TSW1266 EVM GUI, one for external clocking that passes an external clock through the LMK clock chip and the other that lets the LMK generate the clock internally and that configuration should already be set up to accept the 10MHz reference.   Since the external clocking setup uses the same SMA input for the external clock as is used for the 10M reference for internally generated clocking, the transformer coupling for the SMA input needs to handle a wide range of frequencies.  I think the bandwidth of the transformer used for the transformer coupling is not wide enough to pass the 10MHz well.  I note from the datasheet for the transformer that the transformer is not specified for under 50MHz so the transformer rolloff might be too great at 10MHz.

    You could try increasing the amplitude into the SMA, but more likely you may need to swap out that transformer for one with a lower bandwidth that would pass 10MHz.

    Regards,

    Richard P.

  • Hello Richard,
    We probed at Transformer JTX-4-10T at TSW1266 EVM and we got 10 MHz reference signal at the output of the Transformer. How much amplitude is required for it to work properly.
    Thanks for your reply,
  • Girish,

    I have completed verifying that the trigger mode works as expected.  Based on your information it seems you want to use the DAC+TSW1400 setup and the ADC+TSW1400 setup to enable a trigger to drive the DAC pattern and ADC capture at the same time.

    This can be done by enabling the Trigger modes in the DAC and ADC setups of HSDC Pro.  You can have either of the DAC or ADC be slave or master.

    Both Slave:

    In this mode you can just enable the Trigger On DAC and ADC setups within HSDC Pro.  Now on the DAC, you click WRITE DDR, this will load the TSW1400 buffer wit the pattern and arm the trigger on the TSW1400.  On the ADC by default it self arms and waits for a trigger after each capture.  To analyze the data you will need to click Read DDR memory.  Or if you set it to the 2nd ADC trigger mode, you can click Arm On Next Capture Button Press.  This would require you to click the Capture button which arms the ADC system and now it waits for the trigger to come in on J11 Trigger in.  As soon as a rising edge trigger comes to J11 on both TSW1400 you will trigger both the DAC and ADC.

    EIther one as a Master:

    In either the DAC or ADC setup Trigger options you can select Software Trigger Enable.  This means that it will generate Trigger pulse when the capture button is pressed on the ADC setup or the Generate Trigger Button is pressed on the DAC setup.  The ADC setup will issue pulses on SYNC1..4.  You will need to connect this trigger pulse to the Trig In on the same TSW1400 (trigger itself as it is still in trigger mode, just the pulse is generated on board).  The other 3 triggers can be connected to other TSW1400 slaves or to the DAC slave to trigger it.

    If the Software Trigger is enabled on the DAC, it will only issue trigger pulses on SYNC1 and SYNC2 when the Generate Trigger button is pressed.  One of the SYNC must be used to self trigger the TSW1400 and the other can be used to trigger another DAC or ADC TSW1400 setup.

    Only one of the TSW1400 can be setup as a master.

    I have attached a ppt which I did which had the DAC setup as the master - it will generate a pulse on SYNC1 and SYNC2 when the Generate Trigger Button is pressed, one of which is used to trigger itself, and the other is used to trigger the ADC setup.  The ADC is setup as a slave (Software Trigger disabled) and you can either have it set for self arming trigger or trigger on clicking Capture.

    See attached document.

    Ken.

    Trigger on TSW1400.pdf

  • Hi,

    Checking in the LMK0480x datasheet, I see that the minimum amplitude for the 10MHz clock into the LMK is listed at 0.25V swing on each leg of the differential, or 0.5V peak to peak differential.  What amplitude do you see at the pins of the LMK? 

    I'm told that if the amplitude is too low and if Holdover mode is set that the LMK0480x will essentially 'freeze' the frequency it is at instead of locking to the external 10M.  But we checked the configuration files that come with the SPI GUI and I believe the Holdover mode is disabled by our normal config file.   You are using the config file named LMK04808_614p4M_Dual_Loop_10M_Ref.txt?  This config file should set the Holdover mode to be disabled. 

    If the 10M amplitude at the LMK is sufficient and you are using this config file, then we may need to consult our experts in the Clocking forum.

    Regards,

    Richard P.

  • Hi Ken/Richard

    As per your Instruction we have tried triggering and probed at transformer end (voltage values in the pdf file).

    All the procedure and value obtained is summarized in the pdf.

    Still we are not able to synchronize input and output. So it is my humble request, would you please go through the attached pdf and help us.

    Link for file:

    www.dropbox.com/.../TI procedures.pdf


    Input file:

    www.dropbox.com/.../file_15.txt



    With Warm Regards

    Girish Chandra Tripathi
  • Hi Ken/Richard

    As per your Instruction we have tried triggering and probed at transformer end.

    All the procedure and value obtained is summarized in the pdf.

    Still we are not able to synchronize input and output. So it is my humble request, would you please go through the attached pdf and help us.


    With Warm Regards

    Girish Chandra Tripathi


    www.dropbox.com/.../TI procedures.pdf
    www.dropbox.com/.../file_15.txt
  • Girish,

    For this kind of test, do you need to ensure that the entire system is phase locked? Does the DAC clock, ADC clock, and LO all need to be locked? Will any uncorrelated phase error cause the issues you are seeing?

    Ken.
  • Hi Ken,

    For this test we want the entire system should be phase locked.
    The DAC clock, ADC clock, and LO all need to be locked.
    Because if they all are synchronized [locked] then only our objective would be fulfilled.

    With Warm Regards

    Girish
  • Girish,

    If that is the case then I suspect that your system is not locked. Unless I'm mistaken the LO has its own internal 10M reference as does the DAC and ADC board. What you would need is to set up the LO to use external 10M reference, and then have the DAC and ADC board also lock onto an external reference, not the on board reference.

    I will try to acquire the EVMs here and see if I can replicate your system - this may take a few days.

    Ken.
  • Hi Ken,
    We have also tried by selecting ‘Ref Select’ switch to ‘External’ position of LO.
    Connected J16 'REF OUT' of TSW30SH84 to 'Ext Ref In' of LO
    Connected 'REF Out' of LO to J8 'CLK In' of TSW1266.
    But still the results were same as we got earlier. There was phase distortion in AM/PM.
    So it is my humble request, please help us synchronize the input and output with entire system be phase locked at your end .

    With Warm Regards

    Girish
  • Girish,

    You need to confirm that the system is truly locked. My concern is that the clocks are not configured properly. I'm not certain what you connected will work as the REF IN are usually not buffered and sourced out - normally the REF OUT is just the on board 10M that is buffered and send out. Usually the best thing to do is use a single common 10M source and drive that into all 3 boards REF IN. This will ensure that all boards get the same 10M REF.

    As I mentioned before I will see if I can get this working - it will take a bit of time.

    Ken.
  • Hi Ken,
    We have not used a single common 10MHz source . We are making arrangement to acquire a 10MHz source.
    Meanwhile please replicate it at your end after acquiring EVMs and a common 10MHz source. It will be very helpful for us.

    With Warm Regards

    Girish
  • Hello Ken,

    I am also trying to achieve synchronization between transmitter and receiver for DPD application.

    Previously, I was able to get good setup using TSW1266EVM and TSW30SH84EVM using altera FPGA in ohio state university. But I am not able to do the same while using TSW1400EVM.

    I am attaching the file provided by Ti for previous setup, which worked nicely. 

    May be you can suggest equivalent connections of this in TSW1400 EVM.

    Thanks,

    Meenakshi1205.Altera-TI Demo.docx

  • Meenakshi,

    From the document it looks like you used the TSW30SH84 clock output to drive the TSW1266 clock.  This would work to allow synchronized sampling on the ADC and DAC.  The LO source is free running, I'm assuming that since the up and down conversion is with the same LO that any frequency or phase issues would cancel out.

    What is the problem that you are seeing with the TSW1400?  The connections for the ADC and DAC boards should be similar.  Obviously the ARRIAV RF setup will be different from using 2 TSW1400.  However if the ADC and DAC boards are phase locked then you should be able to get a good capture.

    Ken

  • I am using same configuration files provided with demo.
    In previous setup, I was using 307.2 MHz sampling rate at transmitter and 614.4 MHz at receiver.
    With TSW1400 EVM, we have to use 737.28MHz as sampling rate in TSW30SH84. Previously, Jim Setton has clarified that 307.2 MHz cannot be used in transmitter due to device restriction (LMK04808), our previous discussion can be seen in following thread:
    e2e.ti.com/.../437757
    but I am not sure how to decide sampling rate at receiver when I am using clock distribution mode?
    Some direction will be appreciated in understanding this relation!
    Thanks,
  • Meenakshi,

    You cannot use 307.2MHz when using PLL mode. If you are using clock distribution mode, this should not be a problem.

    Regards,

    Jim

  • Girish,

    I was able to make the TSW30SH84 drive an external clock to the TSW1266.  Both the DAC and the ADC were running a data rate of 737.28Msps.  To prove that the system is in sync we would source a coherent buffer in the DAC side, and capture the same length on the ADC side.  If they are timing synchronized then the capture signal would also be coherent with that buffer size.

    I was able to verify this worked ok by switching the TSW1266 external clock to another bench source and the captured signal became non-coherent.  Switching back to the clock from the TSW30SH84 showed coherency again.  This was done with no windowing in place.  Please have a look at the attached file which has the ppt which outlines the setup, as well as a TX buffer from HSDC Pro TSW1400+TSW30SH84 and a captured coherent buffer from  TSW1400+TSW1266.  Let me know if this cross correlation works better.  You will need to normalize as I did do anything to the captured data and it is somewhat attenuated due to the RF path.

    Ken

    temp.zip

  • Hi Ken

    We tried above at our end but not able to cross-correlate.
    As for cross-correlation we require envelope signal
    Can you please check this file
    www.dropbox.com/.../file_15.txt
    and give me its output, so can we cross-correlate
  • Girish,

    Did you verify that you can get a coherent signal by using the TSW30SH84 clock output to drive the TSW1266 CLK IN as I showed on my ppt?

    If you can get a coherent signal at the TSW1266 by sampling the coherent signal from the DAC, then you should be able to run your pattern through.

    Ken.