ADS4245

Srikanth,

How much current draw is associated with AVDD? What is the amplitude of the input clock? What are the CMOS output pins driving?

Regards,

Jim

Jim,
AVDD and DVDD are same source and total current drawn is 420mA. Amplitude of input clock is 1.8V(CMOS) and output CMOS pins drive Actel proasic FPGA.
Regards,
Srikanth

Srikanth,

1. Can you provide us with the ADC portion of the schematic to review?

2. Is there anyway you can separate the supplies to see which one is drawing more than expected?

3. Is there a way to configure the part in serial mode? This may help with troubleshooting.

4. Can you verify the FPGA is not driving these outputs?

5. Are pins 38, 39, 58, 59 no connect?

Regards,

Jim 

Srikanth,

Replace all of the 499 Ohm resistors on the data bus with 0 Ohms. Since you are only sampling at 15MHz, I do not see a need for series dampening resistors. If you want to use them, change the value to 22.1 Ohms. Do you have a capacitor to GND connected to CLKM? I do not see it. Why did you connect the outputs of Bus A to GND? I am checking with the design team to see if this is OK when using standby mode.

Regards,

Jim  

Jim,
I have provided a capacitor to GND at CLKM. I want to use only 12 MSB bits, so I tied two LSB bits to gnd.
Regards,
Srikanth

Srikanth,

Remove the GND connection of the two LSB's. This will draw extra current if you do not..

Regards,

Jim

thanks jim, will try and get back to you.
Regards,
Srikanth