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Compatibility of ADS6442 with ADS52J90 ADC

Other Parts Discussed in Thread: ADS52J90, ADS6442

Question:

We would like to use the ADS6442 in parallel with the ADS52J90 to make a total of 20 inputs with the ADS52J90 in 16 input mode. I know the inputs are compatible but are the serial outputs? The big issue is latency.  Would the framed serial data be simultaneously valid say for sample n for each ADS?  

  • Hi,

    Those two devices are completely different.  The ADS52J90 uses a JESD204b output format, which means the data from the ADCs are formatted onto a number of 8b/10b coded serial lines as described in that datasheet.  I believe that device is supported out of our Medical Group, so support for that device would have to be out of that forum.  (Even if the actual application is not medical, the high channel count devices are usually supported by that group because the medical applications often need so many channels).

    The ADS6442 simply serializes the data onto one or two LVDS pairs and the bit clock and frame clock are on parallel LVDS lines, making it what I would call a hybrid serial-parallel format.  The data is serialized on an LVDS pair, but it is still a parallel bus of LVDS lines with a DDR clock to latch the data at the receive end.  The JESD204b is a true serial interface - the receiver locks to the data stream and extracts the clock from the encoded data. 

    The formats are completely different, and the latencies are completely different and there would be no practical way to equalize the latencies.  One of the features of the JESD204b specification is the ability to take a large number of lanes of data and equalize the latency across all the lanes, so for 20 lanes of data you would want to use enough JESD204b type data converters to get 20 channels.  Then the JESD204b code in your receiver (and FPGA most likely) would adjust for the different latencies across all 20 lanes.

    Regards,

    Richard P.

  • Hi,

    Just one correction to what Richard has stated.  The ADS52J90 does support both a JESD204B interface and a 1-wire mode only LVDS interface.  The ADS6442 supports both a 1-wire and 2-wire interface.  In 1-wire mode there is one differential output pair for each analog input, a DDR data clock to latch the data, and a frame clock to frame the samples for both the devices.  So the output formats are similar but, as Richard said, equalizing the latencies would be a very difficult task.  FYI, the ADS52J90 does also support a 32-ch mode in a time interleaved fashion at a sampling rate 1/2 the maximum rate in 16-ch mode.

    Regards,

    Christian