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ADC14155QML-SP Setup and Hold Times

Other Parts Discussed in Thread: ADC14155QML-SP

I see that the datasheet for the ADC14155QML-SP characterizes the setup and hold times at 155 MHz.  The the part is run at a lower clock speed (for example 75 MHz), how is the setup and hold time changed?  It seems reasonable that either the setup or hold time would extend with respect to the clock period.

  • Timothy,

    I do not think there is any available characterization data at lower sampling rates, though I think you can safely assume that the setup and hold times will stay the same and therefore provide a wider window of operation as the clock period increases.

    Regards, Josh