Hi,
I need to understand how to interface the high sampling rate ADCs >500MSPS, with DSP cores over parallel LVDS, how to do so, how to interface parallel lvds from dsp, what requirement in dsp should I focus on, any details to understand pls.
I selected parallel lvds as I see that the alternate option would be jesd204b, which found in fpga, and keystone II high priced cores.
Thanks