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ADC32RFEVM Single Channel

Marshall Beck
Prodigy 200 points

Hello,

I have the ADC32RFEVM and the TSW14J56 capture board rev B. I am currently operating at a 2GHz sample rate with dual channel enabled.

I am interested in running at 3Gsps but I was informed with the rev B capture board I am unable to run an those speeds due to the FPGA limitations (line rate).

Can I configure the  ADC32RFEVM to run a 3Gsps with 1 channel enabled outputted to 8 lanes? Can you provide me instructions to do so if the ability is there?

Thanks!

  • 0
    TI__Mastermind 29220 points

    Hi,

    No, the ADC does not have an option to spread out the data from one channel over all 8 lanes.   At the max 3Gsps sample rate you just have the option of 4 lanes/channel for the serial line rate being around 12Gbps on the JESD204b lanes.  Or choose the DCC functions and after decimation have less data to transmit over the lanes.   I take it then that you were able to validate the hardware is functional at the lower sample rates and not the revB TSW14J56 is your limiting factor? 

    Regards,

    Richard P.

  • 0 in reply to Richard Prentice
    Prodigy 200 points

    Yes,

    You are correct in your assumption. I have been able to validate performance at 2Gsps.

    I would like to to validate performance at 3Gsps with my current hardware.

    Can you provide the

    Instructions I would need to follow for  decimation to achieve those sample rates?

  • 0 in reply to Marshall Beck
    Prodigy 200 points

    Do you have a config file for this set-up?

    I am trying to sample at 3 Gsps with a 1.5GHz analog in with a rev. B capture board.

    Thanks!