Hello Jim.
I asked you some previous questions about the ADS54J60 demo card. Seems like I have it working now, one of my problems was current limiting the +5VDC. Another problem was I needed to run SysRef from the LMK04828 into the Xilinx JESD IP. Thanks for all you help.
One more question please. Is there ADS54J60 setup that will stop the initial lane alignment from transmitting (in subclass 1)?
Thanks,
John Reyland