Hello.
I designed DAC38RF83 board. and I now want to use this board.
I initialize SPI register refer EVM board.
I think SPI initialize is well done and Internal PLL is locked.
-> Address 0x05's bit [0] have zero value. It is right?
Datasheet ver. June. 2016 is written "Asserted when PLL is locked" and
Datasheet ver Oct. 2016 is written "Asserted when PLL is unlocked". I follow last version.
I think next step is JESD204B initialization.
I know DAC assert SYNCB, and FPGA send K28.5, and blah blah....
But, DAC don't assert SYNCB. This pin (GPO=SYNCB) and pair (SYNCBp/n) and Page4 Reg 0x76 is 0x03.
It is never change.
I set Reg 0x01 to 0xFF08 during initialize.
My configuration is below.
- DACCLKp/n input clock is 153.6 MHz, SYSREF clock is 4.8 MHz.
- On-chip pll enable -> 6.144 GHz..
I want see changing SYNCb pin.
If you have any advice, please let me know.
Thanks.
