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ADS5474EVM: Interfacing with Spartan 3E FPGA Starter Kit Board (Hirose 100-pin FX2 edge connector)

Part Number: ADS5474EVM
Other Parts Discussed in Thread: FMC-ADC-ADAPTER, ADS5474

Hello everyone,

First of all, I would like to tell you all that I have no prior experience in handling high speed ADC and LVDS signals. Moreover, I am new to FPGA. I am so far familiar with SmartFusion Evaluation Kit.

I recently bought a ADS5474EVM evaluation module. I have a Spartan 3E FPGA Starter Kit Board.

A single-ended input signal is converted into a differential signal (LVDS) by the ADS5474EVM. Digital output from the EVM is via a high-speed, high-density Samtec output header. The Manufacturer Part Number of the Samtec header is QTH-60-02-F-D-A.

   

 

The Spartan-3E FPGA Starter Kit board includes a Hirose 100-pin edge connector with 43 associated FPGA user-I/O pins, including up to 15 differential LVDS I/O pairs and two Input-only pairs.

Can anyone please give me any idea how do I connect the ADC board to my Spartan-3E board?

Please note that images are for reference only.

  • Hi,

    You may have to design and fabricate a circuit board to sit between the ADC EVM and the FPGA development platform to bridge the LVDS signals from the ADC to the FPGA.  Or possibly choose a different FPGA development platform in favor of one that you can connect the ADC EVM to.    For example, many of the Xilinx development platforms use an FMC connector and TI makes available just such an adapter card to bridge from the Samtec connector on the ADC EVM to the FMC connector on the FPGA development platform.  http://www.ti.com/tool/fmc-adc-adapter   We do not have available bridge cards for every possible connector or development platform, and I am not aware of a bridge card for the Spartan development platform that you are looking at.

    Regards,

    Richard P.

  • Dear Richard,

    Thanks for the detailed reply. We also have a Xilinx Virtex 5 XUPV5-LX110T Evaluation Platform. I am totally clueless as to whether the FMC-ADC-Adapter will work on this board and if it does, how to connect it. Can you please help me out here?

    Thanks

  • Any updates on the query will be appreciated. Thanks

  • Hi,

    I do not see the FMC connector on that Virtex development platform either, just the header post connector.   I do see in the schematics for that Xilinx board on the Xilinx website that one of the header connectors does support up to 16 LVDS pairs, but whether the FPGA would support the LVDS data rate required for the ADS5474 or not (400 Mbps) you would have to check with Xilinx, also whether one of the LVDS pairs would support a clock-capable input for the DRY signal, and whether the LVDS inputs would accept the DDR clocking.   But still, we do not have an adapter board available to bridge the EVM to the header post connector.  You would have to fabricate such an adapter card or choose an FPGA development board that supported the FMC connector.    I see on the Xilinx site that most of the old Virtex5 development platforms are discontinued, so a newer Virtex development board maybe required.

    Regards,

    Richard P.

  • Thanks Richard.

    Going by your suggestions, I am considering the Nexys Video Artix-7 FPGA Board by Digilent. It has a FMC connector. Our department is planning to purchase a Virtex / Kintex board in the near future but since I there is no definite time given (budgetary problems), I suggested the Nexys Video Artix-7 FPGA Board for the time being. Will it be able to solve my problem? Reference manual is at: [https://reference.digilentinc.com/reference/programmable-logic/nexys-video/reference-manual]

  • hi,

    Be careful.  I don't know the pinout of the FMC connector on that board.  When the adapter board was developed to bridge from our EVMs to the Xilinx FMC connector, we did not pick the routing to the FMC connector.  We had a Xilinx person do that, so that the LVDS clock signal went to connector pins that eventually connected to clock-capable IO pins on the FPGA, and the rest of the LVDS pairs went to FMC pins that eventually connected to LVDS inputs on the FPGA.   If this board you are looking at copied the Xilinx FMC pin assignment, then you should be ok.   But the schematics for the ADS5474 EVM are in the user guide for the EVM on the TI web, and the schematics for the adapter card are on the TI web for that board.  You would need to take those two schematics and trace out each signal from the ADC through the Samtec connector and then through the FMC connector and then through the FPGA board up to the FPGA pins in order to know that each signal is getting to the FPGA and on LVDS capable inputs.  You will need to know that info anyway in order to be able to create your FPGA pin constraint file for when you start to write HDL code for the FPGA.

    Regards,

    Richard P.