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TSW1405EVM: Can it capture both channels of DDR LVDS from ADC16DV160 ?

Fred Zinklehopper
Prodigy 70 points

Part Number: TSW1405EVM

Hello TI Community,

I am a digital hardware engineer.  I want to make sure I am selecting the correct capture hardware for my ADC.

I would like to capture both channels of an ADC16DV160 to verify that I properly receive a test pattern (either using a SPI-port initiated test pattern or by applying a simple sinusoid to the ADC input. 

Each channel of the ADC16DV160 is 16 bits ( 8 LVDS pairs of DDR).  [ Including the clock, that makes 17 LVDS pairs of DDR. ]

The TSW1405EVM looks like it has enough LVDS pairs, but can it handle DDR?

If so, is there a document for the TSW1405EVM that shows which pins handle which DDR data bits ?

Any help would be much appreciated.  Have a good day. 

  • 0
    TI__Mastermind 43930 points

    Hi Fred

    If you plan to evaluate the ADC16DV160 performance you need the following 2 boards:

    • ADC16DV160HFEB
    • WAVEVSN-BRD-5.1

    The ADC and evaluation tools were developed before National Semiconductor became part of TI, and are not compatible with the TSW1405EVM platform.

    Best regards,

    Jim B

  • 0 in reply to Jim Brinkhurst1
    Prodigy 70 points

    Jim, thanks, I do appreciate your help,

    To clarify, we are already successfully using an ADC16DV160 in one of the products we manufacture.

    What I am looking for is something that can do simple unit verification on the factory floor.  I had hoped that the TSW1405EVM could receive a simple test pattern from our unit just to verify pin continuity (open/shorts).

    Are you able to elaborate on why it wouldn't work?  (i.e. can't receive DDR, or GUI / Firmware doesn't support 2 x 16-bit resolution).

    WAVEVSN-BRD-5.1  looks overkill for our needs.  Is it the only option ?

    Regards,

    -Fred

  • 0 in reply to Fred Zinklehopper
    TI__Genius 12965 points

    Fred,

    There are a couple of issues.  The TSW1405 physically won't connect to the ADC16DV160EVM.  Also the firmware for the TSW1405 has never been validated with the ADC16DV160.

    Are you planning on building your own EVM with the proper connector for the TSW1405?

    Ken.

  • 0 in reply to Ken C
    Prodigy 70 points
    Hi Ken,

    I have a DUT which is already designed with the ADC16DV160 chip. We have already done a full evaluation of it using more expensive equipment (NI machine, with PXI capture cards). The design checked out and works fine.

    As we scale up our production, I don't want to buy an NI machine with PXI cards for every test station. Especially since I no longer need to do a full design validation.....just need to capture a simple test pattern to verify traces and solder connections.

    I can easily have a custom high-speed harness designed to interface between my DUT and the TSW1405......but that route only makes sense if the TSW1405 is actually capable of capturing the 16 bits of DDR data.

    -Fred
  • 0 in reply to Fred Zinklehopper
    TI__Genius 12965 points
    Fred,

    I don't believe we have any devices supported on the TSW1405 which are DDR LVDS interface.

    Ken.
  • 0 in reply to Ken C
    Prodigy 70 points
    Hi Ken,

    Ok, how about TSW1400EVM ? Supposedly it does DDR LVDS. Any reason why I couldn't use it (with custom interface cable) to capture from our ADC16DV160 ? (any problems with GUI or Firmware ?)

    -Fred
  • 0 in reply to Ken C
    TI__Genius 12965 points
    Fred,

    Please ignore my previous post. I was a bit confused.

    After looking at the ADC16DV160 interface it looks like it will work with the ADS42LB69 device which is supported by the TSW1405. You may need to confirm that the timing will work, or make an adapter that takes that into account.

    Ken.
  • 0 in reply to Ken C
    Prodigy 70 points
    Thanks Ken,

    So that's good news. I think the timing should be fine.

    My last question then is......Do you have a document that shows how I should map my DDR output pins to the input pins of the TSW1405EMV.

    Neither the user guide for the TSW1405EMV board (slwu079d) nor the schematic show the DDR version of the pinout.


    Regards,
    -Fred
  • 0 in reply to Fred Zinklehopper
    TI__Mastermind 29220 points

    Hi,

    I think what we would have to do is open the schematic for the ADS42LB69EVM, available at the TI web page for that EVM, and then make your adapter board to make your board *look like* an ADS42LB69 EVM after the signal from your board go through your adapter.   you would have to pay attention to the polarity of all the LVDS as defined at the LB69, and then trace through the EVM schematics to the Samtec connector, and then make your adapter so as to make everything look just like the LB69 EVM.  I mention polarity, because there are a couple ways that that could mess this up.   One, sometimes one device might specify a DDR clock such that odd bits are on rising edge while another device might specify even bits on rising edge.  That might call for an LVDS pair to be swapped to the connector to effect an inversion.   Two, we would often tell our EVM layout person to route the LVDS straight to the connector even if *that* swaps an LVDS pair and we would deal with it in the firmware to invert it back.   You would want to check the datasheet specifications for the LB69 format and carefully check the LB69 EVM schematics, and then make your setup match.

    Regards,

    Richard P.

  • 0 in reply to Richard Prentice
    Prodigy 70 points
    Thanks Richard,

    Yes, you nailed that last piece of the puzzle. I got the schematics for the ADS42LB69EVM. Glad I asked the question, because, like you say, the pin mapping is not simply sequential.

    Last question, I promise! : So....after designing & connecting my custom adapter board.....Then in the GUI, I would select "ADS42LB69EVM", and the GUI will download (over USB) a unique FPGA load to the TSW1405EVM which will configure it to receive DDR LVDS output from my DUT...... and then I'm ready for test (?)

    Does that sound right?

    -Fred
  • 0 in reply to Fred Zinklehopper
    TI__Mastermind 29220 points

    Hi,

    Yes, that sounds right.   That is the way it works when the TSW1405 is used with the 'LB69 EVM, and what your adapter would be doing it tricking the TSW1405 into thinking that it is getting its data from the 'LB69 when it is really getting the data from your adapter.   We went through the list of firmware builds available and picked one that was for a device that matched up with the data format of the device you are using in that it is two channel, 16bit in a bit-wise DDR fashion on 8 LVDS pair per channel.   Now you just need to get the right signals to the right connector pins in the right polarity.   I presume the timing is similar in that the DDR  clock is centered on the data window with adequate setup and hold time.  I didn't check that on the device you are using - we do have some devices where the DDR clock is source synchronous with the data and that would mess it up if that were the case.

    Regards,

    Richard P.

  • 0 in reply to Richard Prentice
    Prodigy 70 points
    Thanks Richard, Ken, and Jim !

    I'm thinking this should work then. Looks like for both ADC's the clock edges are right in the middle of the data.

    Thanks very much!