This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

ADC10065: Decoding Analog Input

Part Number: ADC10065

Hi TI,

I'm trying to utilize only the top 6 MSB from ADC10065 and float the 4 LSB.

When I do this, Pins D4 and D6 assert high even with a 0.6V DC signal.  I would expect D6 to assert low at near FS/2.

Can you please help me explain this behavior?

Thanks in advance!

  • Hi Aaron
    You say you have a 0.6V DC signal. Presuming this is applied to Vin+, what is the voltage on the Vin- input?
    Can you share a schematic of your ADC related circuitry?
    Best regards,
    Jim B
  • Jim,

    Yes, V+ is the applied voltage, v- is tied to VCOM. WIll share schematic offline.
  • Hi Aaron

    Vcom will be at 1.45V by default. And since the ISR pin is connected to positive supply, the typical full scale range should be 2V.

    This means that 0 output codes will be reached at approximately Vin+ = Vcom - 1V, and max output codes will be reached at approximately Vin+ = Vcom + 1V.

    This corresponds to 0.45V and 2.45V for min and max codes respectively (assuming all 10 bits are used). This table below shows the expected outputs more clearly for the case with only the upper 6 bits utilized.

    Given some expected part to part variation in both Vcom and FSR, I believe the output code of 101b is within expectations for a 0.6V input voltage.

     

    FSR =

    2

    Vpp

     

    VCOM =

    1.45

    VDC

     

     

     

    Code

    Nominal

    Applied Voltage

     

    Expected

     

    111111

    127

    2.45

    101111

    111

    2.20

    100111

    71

    1.57

    100000

    64

    1.46

     

    011111

    63

    1.44

     

    010111

    23

    0.81

    000111

    7

    0.56

    000101

    5

    0.53

     0.60

    000000

    0

    0.45

     

    Best regards,

    Jim B

  • Hi Jim,

    We got confused on this. First question: is the ADC auto detect output and auto scale itself?

    As the sch we sent over, on 10 bits output ADC and upper MSB 6bits connected to Piccolo, here is what we expected output with respected V+ input:

    Please review and let me know if this make sense.

    D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 V+ Input
    1 1 1 1 1 1 1 1 1 1 2.45V



    1 0 0 0 0 0 0 0 0 0 1.45V



    0 0 0 1 0 1 0 0 0 0 0.770V


    0 0 0 0 0 0 1 1 1 1 0.485V


    0 0 0 0 0 0 0 0 0 0 0.45V
  • Hi Aaron

    I think I had an error in my earlier table due to how I reduced from full 10 to upper 6 bits.

    I have attached a spreadsheet giving the full 10b response for nominal FSR and VCOM. Those parameters can be adjusted to see how the the equivalent voltage at the input will shift.

    /cfs-file/__key/communityserver-discussions-components-files/73/0116.ADC100X0-10b-Codes-to-Voltage-response.xlsx

    I believe the results seen are within expectations given there will be part to part variation in VCOM and Input Range values for these devices. This device was mainly intended for AC signal applications, with less emphasis on DC accuracy.

    Best regards,

    Jim B