Hi,
i am using an ADC (ADC12D500RF) in my design, which is operating on 1 Gsps sampling rate interfaced with virtex-7 FPGA. The IF frequency at the input is 200MHz~300MHz. I am using this high sampling rate for the first time, so i want the hardware design to be reviewed. please reply to this thread so that i can share my design.
Thanks in advance,
KIRTY