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ADS42LB69: Question for datasheet

Shaka Lee
Intellectual 835 points
Part Number: ADS42LB69
Other Parts Discussed in Thread: ADS42LB49

Hello,

I have some questions for datasheet of ADS42LB69 in below link.

www.ti.com/.../ads42lb69.pdf

1. Are there other values for D[5:1] DDR OUTPUT TIMING (Register 16) that I can choose more than in Table 28?

2. I guess there is typo on datasheet of ADS42LB69. Please clarify.

In the Table 17. Register C Field Descriptions, there are same descriptions for different bits as below. 

D2 CHB GAIN EN: Digital gain disabled for 0 and 1.

D[1:0] OVR ON LSB: D1 and D0 are output in the ADS42LB69, NC for the ADS42LB49 for 00 and 11.

3. What is correct bit for High-Frequency mode?

0Dh is only for FAST_OVR_ON_PIN. And I can't find 0Eh on datasheet and 'ADS42LBx9 GUI'.

Best regards,

Shaka

  • 0
    TI__Guru* 91947 points

    Shaka,

    Answers as follows:

    1. No.

    2. Bit D2 second sentence should read as follows:  1: Digital gain enabled.

        Both settings (00 and 11) of bits D[1:0] have the same function as stated in table.

    3. Table 11 will be deleted in the next revision of the data sheet.

    Regards,

    Jim

  • 0 in reply to jim s
    Intellectual 835 points

    Hi Jim,

    Thank you for your answer. Please clarify for question no.3.

    Table 11 is Enable high-frequency modes for input frequencies greater than 250 MHz. Does it mean ADS42LB69 can get frequency input greater than 250MHz without any register setting?

    Best regards,

    Shaka

  • 0 in reply to Shaka Lee
    TI__Guru* 91947 points

    Shaka,

    That is correct. But if you go higher than 250MHz up to 400MHz, per the data sheet, the analog input should not exceed 2V p-p.

    Regards,

    Jim