There are some trouble about mapping the lane to link1 of DAC39J84. When I map all lanes to link0 the dac39j84 can operate normally. But there all no output when I map all lanes to link1. I just change following the register's configruation compared with the configruation of mapping to link0. There are no errors reflecting in config100-congfig101. The sync is high all the time. And I can catch process of high to low and then low to high of sync.
config73: 0x0000 to 0x5555.
config92：0x0006 to 0x0060.
config97: 0x0001 to 0x0002.
Zhipeng
