ADS54J66EVM: How to use external Clock generated by a DDS eval board without 10MHz reference in ADS54J66EVM

Hello,

We are looking into this, and should be back with you soon.

Regards,

Dan

Jim,
Thank you for your answer.

I tried your solution using a power splitter providing the 500MHz clock signal to J6 and J12.
Unfortunately, the Input signal (I varied the frequency from 10MHz to 50 MHz) was not digitized : there was no samples of this signal and there's no noise in the software. It seems that the digitizer do not work correctly with the power splitter driving J6 and J12.
I read in the "User's Guide SLAU641D–June 2015–Revised January 2016 ADS5XJ6X Evaluation Module" (p. 14) that the solution to use an external clock requires a hardwre modification of the ADC board:
"5.1.1 External ADC Sampling Clock
.... For this option C47 and C48 need to be uninstalled and installed at R35 and R39...."
I would like to have your confirmation for this modification.
I also would like to know if the ADC will also work in this copnfiguration with the internal clock ?

Thank you for help.

Best regards
Farah

Farah,

You need to make this modification to allow the external clock signal from the SMA to be connected to the ADC.  Please send me a screen shot of the LMK clock outputs and the SYSREF tab you plan on using in this mode. You may have an issue here. What was the power of your input clock?

Regards,

Jim

Hi Jim,

Sorry for the late reply

I applicated the modification "C47 and C48 uninstalled and installed at R35 and R39", I proveded a 491.51 MHz external dock.

1. With a power divider to provide clock at J6 and J12 but not working with both configuration "LMK_Config_External_Clock.cfg       and     ADS54J66_bypass_4421.cfg". The Level varied between 3 to 13 dBm for this test.
2. With the 491.52M at J6 (also between 3 to 13dBm) and 10MHz (provided by the same clock generator) at J12 with jumper installed.
   1. Not work with configuration "LMK_Config_External_Clock.cfg       and     ADS54J66_bypass_4421.cfg".
   2. Work with configuration "LMK_Config_LMF_4841_491p52_MSPS.cfg    and     ADS54J66_bypass_4421.cfg".
      
      

So I think it was a problem with "LMK Config External Clock.cfg" file, after applicated of this file configuration and with presence of the 10MHz or 491.52KHz at J12 the D6 not lit. Look images.                                                                                                                                                                                                                                                                                                         

1. Configuration "LMK_Config_External_Clock.cfg       and     ADS54J66_bypass_4421.cfg" with 491.52M at J6 (also between 3 to 13dBm) and 10MHz (provided by the same clock generator) at J12 with jumper

removed. Not working.

2. Configuration "LMK_Config_LMF_4841_491p52_MSPS.cfg       and     ADS54J66_bypass_4421.cfg" with 491.52M at J6 (also between 3 to 13dBm) and 10MHz (provided by the same clock generator) at J12 with jumper installed. Not working.

3. Configuration "LMK_Config_External_Clock.cfg      and     ADS54J66_bypass_4421.cfg" with 491.52M at J6 and J12 using a power divider with jumper installed. Not working.

Best regards

Said FARAH

Sorry Jim,

       The only configuration that works is  "LMK_Config_LMF_4841_491p52_MSPS.cfg       and     ADS54J66_bypass_4421.cfg" with 491.52MHz at J6 (level between 3 to 13dBm) and 10MHz (provided by the same clock generator) at J12 with jumper installed.

       All other configurations not working.

      Are you sure we need to uninstalled C47 and C48 and installed it in the place of R35 and R39 (installed capacitor in the place of a resistor?) or instal 0 Ohm in R35 and R39 with C47 and C48 uninstalled as shown in the following image.

We purchased the ADS54J66 EVM to be used exlusively with an external clock generated by a DDS.

Best regards

Said FARAH

Hello,

       Not working, I am using External 491.52MHz at 13dBm level with a power divider to the two inputs J6 and J12 (10dBm for each one) with your configurationn as in the power point file. See images.

       The clock signal is present in the ADC inputs. The Level is sufficient also but not working.

FARAH

Hello Jim,
If no solution to make ADS54J66EVM working with external clock signal, can you give me a similar file like "LMK_Config_LMF_4841_491p52_MSPS.cfg" but working at 500MHz, so a file named "LMK_Config_LMF_4841_500p00_MSPS.cfg" for example or tell me how I can prepare or generate this configuration file.

Best regards

Hi Jim,

     Thank you for your power point file.

     I have a software problem in the phase of configuration of ADS54Jxx EVM GUI (v1.8). After loading LMK file “LMK_Config_External_Clock.cfg” and when I want to make DCLK Divider at 2, it forces the value at 31, for the DCLK source for example, it makes “Analog Delay+….” Instead of “Divider”, so it takes the last value in the list each time.

     I work on Windows 10 PC, I will try on a Windows 7 PC. This problem does not occur when I load the LMK “LMK_Config_LMF_4841_491p52_MSPS.cfg” for example. But this LMK is not intended for the external clock.
       I informed you of the results on windows 7 soon.

                                                           

Best regrads

Farah

Farah,

There will be some attenuation caused by the transformer and the ADC itself and this will change over frequency.

Regards,

Jim

Hi Jim,

    So a multitones calibration is required in this case (frequency-dependent attenuation).

Best regards,

Farah