Part Number: DAC38RF87EVM
My project works perfectly on the Xilinx KCU105 but not with boards made by other manufacturers. I have tried two separate boards and they both are losing CPLL lock in the GTH after I pulse SYSREF. Also after I pulse SYSREF, everything in my GTH zeroes out(reset_done,txdata,txcharisk) almost like the JESD core is put into reset. It is not until I reset the JESD core that the CGS starts sending out the GTH and the CPLLs are in lock again. Lastly, I am never seeing in_sync go high.
Thank you