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TI Home » TI E2E Community » Support Forums » Data Converters » High Speed Data Converters » High Speed Data Converters Forum » All Tags » A/D converters
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High Speed Data Converters

Welcome to the High Speed Data Converters Section of the TI E2E Support Community. Ask questions, share knowledge, explore ideas, and help solve problems with fellow engineers. To post a question, click on the forum tab then "New Post".

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A/D converters
  • 100MSPS
  • A/D converter
  • AD62P43EVM
  • AD62P49 sample & hold quantization noise SAR ADC
  • ADC
  • ADC 10bit/10G.12bit ADC
  • ADC data analysis
  • ADC digital output unstable (Any design issue?)
  • ADS5271 serial interface
  • ADS58C48
  • ADS62P42
  • EKK-LM3S811
  • uVision4
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    eli eli
    Hi, Can you check if the wiring of the ADS804E are correct,as not sure about the connection of VREF,SEL. (Please visit the site to view this file)
    on Aug 29, 2011
  • Forum Post: DAC3282 maximum spi instruction frequency

    Janne Anttila Janne Anttila
    Hi, Does anyone have idea, what might be the maximum spi instruction frequency for DAC3282? In other words, how long I should keep SDENB at high state, before I can initiate a new spi command to the DAC? Rgds, Janne Anttila
    on Jun 4, 2012
  • Forum Post: How to program? AD0(thumbwheel) of EVB-LM3S811 with uVision4 to print the value (Volts) in the Oled 96x16.?? Help-me!!

    Diego Souza Diego Souza
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  • Forum Post: ADS5271 Serial interface configuration

    Pablo Moreno Pablo Moreno
    Hello, I am currently working in a project to interface TI ADS5271 ADCs from a Xilinx Virtex 5 FPGA. For the moment I am implementing the functionality for configuring the ADC internal registers. From the device datasheet I extract that I have to perform a reset pulse, wait for the stablished time...
    on Aug 7, 2012
  • Forum Post: ADS62PXX Family of ADC

    Brad Hill Brad Hill
    I can not seem to get the ADS62P42 adc to continue to work. It work just fine for a while but then the outputs stop working. I am using an FPGA to interface with it and thought that perhaps upon reconfiguration of the FPGA the pins did something unusual and caused the outputs to stop working. Has anyone...
    on Sep 11, 2012
  • Forum Post: ADC16V130, Input impedance

    Larry Stanton Larry Stanton
    What is the input impedance of the ADC16V130 in the frequency range of 50MHz to 150MHz? I know that the input is a switched capacitor arrangement. The data sheet show the switches and the two capacitors, Cs, but no values are specified. I need to know how to model the input so that I can assure...
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  • Forum Post: tsw1200evm/ads58c48 signal capture problems

    Todd Moore Todd Moore
    Hello forum, I'm working with the TI ADS58c48EVM attached to TI TSW1200EVM to evaluate the ADS58c48's performance for a project. I followed the ADS58c48EVM User's Guide, pgs 6-8, but I don't think the data isn't being captured properly. My setup: Clock is 200MHz sine wave, 1Vptp...
    on Dec 5, 2012
  • Forum Post: A question in ADS6424

    aongkun aongkun
    Hi, Now I use ADS6424, when I set parrallel config pin: CFG1 CFG2 CFG3 CFG4, in pin assignments part of datasheet(page 25) these four pin is related to AVDD, but in page 15 these four pin is related to LVDD, can you tell me which one is corret? Bill
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  • Forum Post: Interfacing ADC to OMAP138 at >60MSPS

    Y B.Z Y B.Z
    Hi, I am trying to design a board that will interface a high speed ADC to OMAP138 The ADC should be 10b@(>60MSPS ), pereferably low power. I would like to design it without glue logic if possible and verify the DSP can handle the 60MSPS and higher throughput. Any idea on how to do it or design...
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  • Forum Post: RE: FMC-Adapter link which work with ADC5482EVM.

    Akshat Jain Akshat Jain
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    on May 15, 2013
  • Forum Post: TSW1200 EVM

    Vaibhav Tripathi Vaibhav Tripathi
    Hi, I am using the TSW1200EVM to capture the output of an 8 bit 400Msps converter. The inputs to TSW1200 board are provided using the 120pin samtech connector that include 16 LVDS pairs (8 bits) + ADC clock (p and m). I have configured the EVM in single channel SDR format and am using the MATLAB interface...
    on Jul 12, 2012
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