High Speed Data Converters

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High Speed Data Converters

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Related Posts

  • Forum Post: Xilinx FPGA code to interface with TI ADS4246EVM

    Jacob Neumann
    I am working with the ADS4246EVM and would like to read it with the Xilinx ML402 Eval Platform. It has a Virtex 4 on board (XC4VSX35). I have seen people request the Xilinx ISE files for the TSW1200EVM also with Virtex 4 on board (XC4VLX25) and I would like to be emailed these files too to help me...
    on Oct 26, 2011

  • Forum Post: Looking for a DAC and DSP (FPGA)

    Matthew Schlitt
    Hello, I'm working on a senior design project for UConn and we're tasked with developing a guassian pulse train. We've decided to use a DAC and DSP to do this. I'm looking for a DAC that has at least 400 MSPS input data speed and a compatible DSP. Does TI make a DAC that gets at...
    on Dec 6, 2011

  • Forum Post: using DAC3162EVM evaluation board

    Manuel Dardon
    Hello, we are trying to create a sine and cosine wave from an fpga evaluation board ( virtex6 ML605 evluation board). We bought the DAC6132EVM and the FMC adaptor for it because the virtex6 has the FMC connection. The problem we have is that the DAC has to be configured and apparently it comes configured...
    on Mar 6, 2012

  • Forum Post: Question regarding using ADC12D1X00RFRB Reference Board/Wave Vision 5

    M P
    I am using the ADC12D1X00RFRB reference board with Wave Vision 5 to evaluate a TI ADC. I am able to use the internal clock with a signal generator to look at an an input signal using the Wave Vision 5 software. According to the manual and the software options in Wave Vision 5, I am supposed to be able...
    on Mar 22, 2012

  • Forum Post: Re: DAC34H84EVM with ML605 FPGA: Image on Fdac/2

    Martin Mataln
    Hi! After another whole day of testing and trying out a lot of things i have found a solution to this problem. The alignment between the CLK to the FPGA and the DATA CLK was wrong (see graphic). Unfortunately I have no explanation for that. Actually the clock domain of the DAC and the FPGA are...
    on Mar 29, 2012

  • Forum Post: ADS5545

    Brad Safranski
    Hello all, I am using the ADS5545 ADC in a design with a Virtex 5 FPGA.. We are using the 5545evm evaluation module (http://www.ti.com/tool/ads5545evm) for testing. I notice that board has a Spartan3 FPGA on it. This means that there must be Xilinx-compatible interface code in the design. I am interested...
    on Jul 10, 2012

  • Forum Post: Best Choice for SDR platform?

    Arthur Adams
    I'm working on SDR project that needs 8 MSPS I/Q (16-bit samples) signal generation in real-time (on the fly). For generation 8 MSPS I/Q 16bit samples, 8x16x2 = 256 Mbps or 32MBps (Mega Byte per second) bus needed, so I think this will rule out USB interface. What is the best (price+time) choice...
    on Jan 24, 2013

  • Forum Post: TSW30SH84EVM FMC Interface Sample Code

    Jared Kirschner
    Hello, I am working on a high speed communications project which interfaces with the TSW30SH84EVM using a Kintex-7 FPGA over an FMC connection (through the TI DAC-FMC-ADAPTER). My team has not been able to find a reference design for the TSW30SH84EVM interfacing with an FPGA over FMC. Could someone...
    on Feb 7, 2013

  • Forum Post: TSW1400EVM Source Code?

    Jared Kirschner
    Greetings, I am working on a project which involves the use of the TSW30H84EVM complete RF transmit chain. Currently, the TSW30H84EVM is being provided data to transmit from the TSW1400EVM pattern generator. The TSW1400EVM pattern generator is incredibly useful for testing, but the eventual goal is...
    on Feb 25, 2013

  • Forum Post: Interfacing DAC34SH84EVM to FPGA Dev. board

    Giovanni Donati
    Hello to everyone, I am writing here in order to ask some information about the interfacing of the DAC34SH84 Evalutation module, to my FPGA board. Basically what I would like to do is to generate two output signals with my FPGA and send them to the next device. The problem is that I woul like to...
    on Apr 29, 2013

  • Forum Post: ADC12D1800RF source code and streaming data on FMC

    Maurice Saccani
    hi, i'm trying to get data from ADC12D1800RFRB's FMC connector to a ML-605 board. I replicated part of fpga code for virtex4 on my virtex6 and i can receive and see correctly the I part of sampled signal (a test sine wawe). The Q part is not correct, in particular the Qd_r and Qd_f signals...
    on May 15, 2013

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