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LDC1000 and Data acquisition distance

Hi,

      what is the maximum distance is possible between LDC1000 and a Master device. How to increase the distance between LDC1000 and Master controller?


Thanks in advance.

Kumar

  • How far do you need to go?

    This is not an easy answer, as it depends on the system implementation. A ground plane under the traces will allow for a longer distance. Good layout with impedance control will allow for increased distance. Decreasing the digital data rate can also increase the distance. With some care, more than 1m should be fine.

  • The Approximate distance is 50cm. Could you please explain what is the best practical method used to take SPI data for 50cm distance.

    Thanks,

    Naveen

  • The first goal should be to design a clean transmission line. You should have a continuous ground plane underrneath a of the traces. There should be no gaps in the ground plane. Minimize the number of vias on the traces - it is best if you can keep the traces on the same layer for the whole run.

    Maintain a consistent trace thickness - I would say a trace thickness of ~0.25mm is reasonable (thinner will be a higher characteristic impedance, and may have a larger resistive loss, but you will have less parasitic capacitance). Don't run the traces too close together for the whole run - keep them >1.5mm apart. If the traces are too close together, then some higher frequency components could couple from one line to the other. You should match the trace lengths to within a few ns.

    I assume that the LDC1000 is the only device on the SPI bus; a bus of this length could have problems if there are other devices on it.

    I also assume you are using FR4 as the board material; that will be fine. 

    Next, the parasitic capacitance can pose a problem. There will be a larger amount of capacitance hanging on the output from the trace to ground. Using an output buffer is a common approach to handle this - however you would need to have a buffer for the CSB/SCLK/SDI near the master and the SDO needs to be buffered near the LDC.

    You may be able to place a series resistor on each of the signals - the SCLK/SDI/CSB should have the series resistor near the master, while the SDO should have its resistor close to the LDC. The resistors should match the trace impedance

    Check timing with scope at device and master to make sure that the edges on the signals align. Also make sure that there are no transmission line effects - if there are, you may need to adjust the series resistors.  

     

  • I will update on this in future.

    Thanks Chris.