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What exactly is the problem you're having?

The problem is that so far I could not do any shows with ads1298, not that I'm failing. I do not get any data in the buffer.

El problema es que hasta el momento no he podido realizar ninguna muestra con el ads1298, no se en que estoy fallando. No obtengo ningun dato en el buffer.

Is this with an ADS1298 evaluation module or your own design? Is the MSP430 on an evaluation board? If this is a pair of EVMs please share how the EVMs are connected, if it's your own hardware please share a schematic. Have you verified the functionality of your serial communication lines with an oscilloscope?

It is my own design, and now I am not in position to use an oscilloscope, you could say I'm working with nails.

Es mi propio diseño, y actualmente no me encuentro en posicion de poder utilizar un osciloscopio, se podria decir que estoy trabajando con las uñas.

Juan,

Your schematic did not post, if you can post it as a PDF I think we'll have better success.

In reviewing your C code I noticed a few things...

#include "msp430bt5190.h"

#define   PWDN             BIT2
#define   RESET_ADS        BIT3
#define   START            BIT5
#define   CS               BIT6
#define   CLKSEL           BIT0

char  RESA[26];
unsigned int i;

void main(void)
{
 
  WDTCTL = WDTPW+WDTHOLD;                    // Stop watchdog timer
  P4DIR = RESET_ADS + START + PWDN + CLKSEL; // P for RESET_ADS, START, PWDN, CLKSEL
  P3DIR = CS;                                // P for  CS
  P4SEL = 0X80;                              //DRDY
 
  P3SEL |= 0x31;                            // P3.5,4,0 option select spi
  P3OUT |= ~CS;                             // Disable CS
  UCA0CTL1 |= UCSWRST;                      // **Put state machine in reset**
  UCA0CTL0 |= UCMST+UCSYNC+UCCKPL+UCMSB;    // 3-pin, 8-bit SPI master
                                            // Clock polarity high, MSB
  UCA0CTL1 |= UCSSEL_2;                     // SMCLK
  UCA0BR0 = 0x02;                           // /2
  UCA0BR1 = 0;                              //
  UCA0MCTL = 0;                             // No modulation
  UCA0CTL1 &= ~UCSWRST;                     // **Initialize USCI state machine**
  UCA0IE |= UCRXIE;                         // Enable USCI_A0 RX interrupt

  P4OUT &= ~START;
  //__delay_cycles(100);                    // Wait for slave to initialize
  P4OUT |= ~PWDN;
  //__delay_cycles(100);                    // Wait for slave to initialize
  P4OUT |= ~RESET_ADS;
  __delay_cycles(100);                      // Wait for slave to initialize
  P4OUT &= CLKSEL;                          // Set CLKSEL Pin = 1
  P3OUT &= CS;                              // Enable CS
 

<...begin utilizing the device...>

You've defined the symbol CS as BIT6 from the msp430 header, which is usually defined as 0x0040. In the code above you...

1. Set pin 6 of port 3 as an output
2. Set P3OUT = P3OUT | ~0x0040, which should yield P3OUT = 0x00BF - pin 6 is low
3. Set P3OUT = P3OUT & CS, which will yield P3OUT = 0x0000 - pin 6 is still low

On port 4 you do something similar...

1. P4OUT = P4OUT & CLKSEL - this does not set CLKSEL = 1 unless your code is misleading - I can't tell which port/pin CLKSEL is actually connected to since your schematic did not post cleanly.

These type of assignments make me skeptical of the entire initialization sequence. You should really try to get access to an oscilloscope or logic port or SOMETHING to see what is actually happening on the MSP430 serial lines.

Check out this code on our design notes page. This might help you get things ironed out and set-up.

Usually, I document a little more, but as I do to raise the spi clock to 2 MHz ?

Listo, ya me documente un poco mas, pero como le hago para subir el spi clock a 2Mhz?

This is my schematic

yellow = spi clock

blue = drdy

Juan Gilberto

Usually, I document a little more, but as I do to raise the spi clock to 2 MHz ?

Listo, ya me documente un poco mas, pero como le hago para subir el spi clock a 2Mhz?

You'll have to pardon me, but I'm not sure what you're asking. Are you asking if a 2MHz SPI clock is allowable for the ADS1298? Are you asking if your MSP430 can implement a 2MHz SPI clock? Are you asking how to do it?

From your scope shot it doesn't seem like you're achieving any output on the SCLK line...

Hello again.

I think and misconstrued my question, I could make the spi clock operated at 2 MHz and ads like the picture shows drdy starts but stops spiclock.

Hola nuevamente.

Creo que e planteado mal mi pregunta, ya pude hacer que el spi clock  funcionara a 2 Mhz y el ads como en la imagen muestra inicia el drdy pero spiclock se detiene.

The DRDY pulse stops your SCLK? Your MSP430 should be providing the clock to the ADS1298 - the ADS1298 cannot operate as a SPI master and provide the clock. Do you have an ICDI available to step through and debug your code to see what is causing the SCLK to stop?

Sorry for my ignorance........ ICDI?

I'm working with:
-MSP-EXP430F5438
-MSP-FET430UIF

ICDI is an In Circuit Debugger Interface. The MSP-FET should be the ICDI for your device. You might set a break point in the ISR servicing the DRDY interrupt and see what is happening to your SCLK line.