This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
we apply a pulse train of zeros and ones .
Take a look at Figure 11 on page 7 of the DAC7821 data sheet. The output transition should take about 50ns. In Table 1 starting on page 12 of the DAC7821 data sheet, you will find some details on various amplifiers you can use with this MDAC. Take a look over the choices listed and see what fits your power budget.
The OPA277 you are using currently has a slew rate of only .8V/us which is going to be the limiting factor on your settling time at TP7. Changing to the OPA727 would give you a slew rate of 30V/us - significantly faster but that comes at the cost of higher power consumption.
In reply to Tom Hendrick:
In reply to eli:
The file that you attached is the schematic. Is there another picture that you wanted to attach that shows the three files and pictures of the performance that you see?
A couple comments on the DAC and your schematic-
- You will want to avoid using the same source for the reference and the power supply. Any ripple on the power supply will couple through the reference and out the output of the DAC. Additionally, MDAC's generally prefer a buffered reference voltage to help source the current to the device.
- You will want a 1-10uF capacitor on the reference pin of the DAC to help clean and stabilize the reference voltage.
- Take a look at the DAC glitch spec to get an idea of what behavior to expect during a DAC output update. Figure 9 we show what the glitch would look like a midscale (worst case) but you should expect to see some glitch behavior at all DAC updates. If you can send pictures showing the ringing behavior, I can compare to see if it is comparable to what we would expect.
In reply to Tony Calabria:
Above are two picture.
Top picture looks like you may have some grounding issues. The bottom picture points more to switch charge injection from the internal R2R DAC. You will want to add a 1-10uF capacitor on the Vref line as well as a small capacitor on TP1 and TP2 to help clean up the signal.
All content and materials on this site are provided "as is". TI and its respective suppliers and providers of content make no representations about the suitability of these materials for any purpose and disclaim all warranties and conditions with regard to these materials, including but not limited to all implied warranties and conditions of merchantability, fitness for a particular purpose, title and non-infringement of any third party intellectual property right. TI and its respective suppliers and providers of content make no representations about the suitability of these materials for any purpose and disclaim all warranties and conditions with respect to these materials. No license, either express or implied, by estoppel or otherwise, is granted by TI. Use of the information on this site may require a license from a third party, or a license from TI.
TI is a global semiconductor design and manufacturing company. Innovate with 100,000+ analog ICs andembedded processors, along with software, tools and the industry’s largest sales/support staff.