Guru 10425 points

 we apply a pulse train of zeros and ones .

 5287.dac7821_ CHANNEL23.pdfThe output should be 0v to 3.3v 
Can you tell me what is the settling time from strobe at TP10 to output at TP7
According to the datasheets ?.
Is there a way to improve the response time ?.
  • Hi Eli,

    Take a look at Figure 11 on page 7 of the DAC7821 data sheet.  The output transition should take about 50ns.  In Table 1 starting on page 12 of the DAC7821 data sheet, you will find some details on various amplifiers you can use with this MDAC.  Take a look over the choices listed and see what fits your power budget.

    The OPA277 you are using currently has a slew rate of only .8V/us which is going to be the limiting factor on your settling time at TP7.  Changing to the OPA727 would give you a slew rate of 30V/us - significantly faster but that comes at the cost of higher power consumption. 




  • Guru 10425 points

    In reply to Tom Hendrick:

    Attached 3 files.
    Attached 3 files
    1.     DAC board that uses the TI chip DAC7821.
    2.    Small output signal
           The  data of one of the DAC7821 is set to 400 and to 0 and vice versa .
    3.     Large output signal
           The  data of one of the DAC7821 is set to 4096 and to 0 and vice versa .
    Can you explain the ringing , What should I do to avoid them.
  • In reply to eli:

    Hi Eli,

    The file that you attached is the schematic. Is there another picture that you wanted to attach that shows the three files and pictures of the performance that you see?

    A couple comments on the DAC and your schematic-

    - You will want to avoid using the same source for the reference and the power supply. Any ripple on the power supply will couple through the reference and out the output of the DAC. Additionally, MDAC's generally prefer a buffered reference voltage to help source the current to the device.

    - You will want a 1-10uF capacitor on the reference pin of the DAC to help clean and stabilize the reference voltage.

    - Take a look at the DAC glitch spec to get an idea of what behavior to expect during a DAC output update. Figure 9 we show what the glitch would look like a midscale (worst case) but you should expect to see some glitch behavior at all DAC updates. If you can send pictures showing the ringing behavior, I can compare to see if it is comparable to what we would expect.


    Tony Calabria

  • Guru 10425 points

    In reply to Tony Calabria:

    Above are two picture.

    Please advise



  • In reply to eli:

    Hi Eli,

    Top picture looks like you may have some grounding issues. The bottom picture points more to switch charge injection from the internal R2R DAC. You will want to add a 1-10uF capacitor on the Vref line as well as a small capacitor on TP1 and TP2 to help clean up the signal.


    Tony Calabria