Problem in reading the digital data from ADS8284I four channel 16 bit ADC.

Circuit Details-

  1. VCC = +5V, VEE = -5 V, Analog ground is represented as AGND, VA = +5 V same as VCC with respect to AGND, VBD = 5V_B=5 V  with respect to BGND (digital ground)

2.      AGND and DGND shorted on one point using Jumper J10 in schematic.

3.      REFOUT connected to REFIN and BUSY connected to MXCLK.

4.      BUS18_16 and BYTE are permanently grounded (logic low level)to get 18 bit output, we are reading upper 16 bits leaving lower two LSB’s using DSP. Buffer is connected at the outputs of the ADC.

5.      C1 is permanently high (logic high), C2 and C3 are permanently low (logic low) and AUTO is permanently high for auto mode.  With this connection we would like to read from channel 0 and channel1 two channels in auto mode.

6.      CS and RD are toggled using DSP.

7.      Start of conversion (Active low) is generated (a pulse) using DSP.

 We are getting

 3.76 Volt on internal reference output pin 11,

 3.76 Volt on BUF-REF pin15

 and  1.88 Volt on VCMO  pin 14

 but as per datasheet these should be 4 volt , 4 volt and 2 volt respectively.

 Please clarify????

When we give start of conversion on pin 2 we get busy signal after giving start of conversion but we get fixed digital data either 0 or 5AD2 on giving read signal for all the inputs (-4 volt to +4 volt).

 We do not understand where is problem. Pl provide technical support for getting correct digital outputs.

 

 

  • Hi Seema,

    While we're waiting for your schematic attachment, how do you have REFM connected?

  • In reply to Tom Hendrick:

    Pl. find schematic of the circuit in the file attached sch_8284I(1).pdf

    sch_ADC8284I (1).pdf
  • In reply to seema sheth:

    Hi Seema,

    When buffer dir is low, the direction is A to B.I think what you want is B to A. Pls check the direction of U2 & U3.

  • In reply to embedengg:

    No, when dir is low direction of buffer os from B to A .

     On buffer there is no problem.

    Please suggest  proper solution.

  • In reply to seema sheth:

    my mistake.I didnt even verify with 245 datasheet.

     

    When C1-1 ,C2-0,C3-0, in Auto mode channel sequence is 0 & 1. It doesnt scan channel 2 & 3. Could this be a problem ? If you wanted to auto scan all 4 channels then C1- +5V,C2-+5V & C3-AGND

     

    C1,C2,C3,AUTO are analog side signals , will giving digital 5v and BGND to these pins cause any problems?? Since you are shorting BGND & AGND this shouldnt be a issue.

  • In reply to embedengg:

    Thanks for the reply.

    We are scanning only two channels  channel 0 and channel 1 in auto mode.

    We are assuming  AUTO C1, C2, C3, BUS18/16, BYTE,RD ,CS. MXCLK and  CONVST as  digital signals. We are reading BUSY signal with respect to digital ground.

    Please clarify are all these signals Analog???

    We are connecting analog and digital grounds at one point  at the time of test, but we get AGND and DGND shorted even without shorting themon the board.  I think some mixing is going on between AGND and BGND.

    I want to know weather all these signals are analog??? 

    If possible send me correct schematic design for using ADC in which analog and digital signals are specified.

     

  • In reply to embedengg:

    Thanks for the reply.

    We are scanning only two channels channel 0 and channel 1 in auto mode.

    We are assuming  AUTO C1, C2, C3, BUS18/16, BYTE,RD ,CS. MXCLK and  CONVST as  digital signals. We are reading BUSY signal with respect to digital ground.

    Please clarify are all these signals Analog???

    We are connecting analog and digital grounds at one point at the time of test, but we get AGND and DGND shorted even without shorting themon the board.  I think some mixing is going on between AGND and BGND.

    I want to know weather all these signals are analog??? 

    If possible send me correct schematic design for using ADC in which analog and digital signals are specified.

    I have few more doubts:

    (1)   To convert Bipolar Input Signals to Unipolar Differential Signals using resistor network I am taking BREF (In the schematic attached) on resistor network from pin  15 of ADC (BUF-REF). Is this correct??? Or it should be taken from pin14 VCM of ADC ????

    (2)   Maximum bipolar voltages which can be applied to Input of resistor network is +4 Volt to -4Volt or it will be +8 Volt to -8Volt, This doubt is coming because Signal on CHp and CHn will be half of the applied bipolar signal on the resistor network.

    Please clarify these doubts.

  • In reply to seema sheth:

    Hi Seema,

    On Page 26 of the datasheet, in application diagram,  AUTO C1, C2, C3, BUS18/16, BYTE,RD ,CS. MXCLK and  CONVST are denoted as signals coming from the host, so they are all digital and not analog.

    Reference voltage also look ok.

    I also want to know how the input is usually fed to this chip.

    Because in page 27 , the diagram says 2* ref, true bipolar.(then it will be +8 to -8)

     

  • In reply to embedengg:

    Please refer my schematic diagram I am giving bipolar signal to the resistance network the output from the resistence network is applied to the ADC6470.sch_ADC8284I.pdf

  • In reply to seema sheth:

    Hello Seema,

    In the schematic, since the negative side of the resistor network is grounded, the common mode of the CxP and CxM inputs cannot be kept at Vref/2 as required by the ADS8284.

    The resistance network in Figure 71 has the following transfer functions
    CxP = Positive_input/2 + BREF/2
    CxM = Negative_input/2 + BREF/2

    To keep both CxP and CxM with Vref/2 for any differential voltage, the resistance network inputs should be symmetric so that the negative input is the inverse of the positive input.

    For example for a Vref = 4V, the resistance network input should be symmetric between -4V to +4V.

    Positve
    Input
    Negative
    Input
    Vdiff
    Res Net
    CxP CxM ADC Diff Common
    Mode
    4 -4 8 4 0 4 2
    -4 4 -8 0 4 -4 2
    1 -1 2 2.5 1.5 1 2
    -3 3 -6 0.5 3.5 -3 2

    Thus, two op-amps are needed at the input of the resistor network making sure that their outputs are symmetrical.

    Another possibility is to remove the resistor network and use a fully differential amplifier. These amplifiers keep a constant output common mode regardless of the input common mode.

    Regarding the grounding mentioned before, BGND and AGND should be tied together with J10. This part doesn’t offer isolated grounds.

    The 3.78V reference voltage is not normal and it might be a damaged device. Be aware that, with the configuration shown in the schematic, an input voltage higher than 5V and lower than -5V can damage the device.

    Best regards,
    Rafael