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TMS320 WITH EXTERNAL SPI ADC

Other Parts Discussed in Thread: TMS320F28335, ADS8556, THS4032, DAC8568

I want to use the ADS8556 with my TMS320F28335 device.

I have bought the ADS8556-EVM. I would use only the single (positive) supply. 

I have check the datasheet of the ADS8556 (pag.2 and pag.10) and the datasheet of the EVM (pag.7) . 

I would do this links:

 

(+VA) connects to HVDD                                 ---->       J1.1        ---->      +15 V

(+5VA) connects to AVdd, optional HVDD ---->       J1.3        ---->      +5 V

(–VA) connects to HVSS                          ---->       J1.2        ---->      GND

(–5VA) optional HVS                                     ---->       J1.4        ---->      GND

BGND                                                          ---->       J1.5        ---->      GND

AGND                                                         ---->       J1.6        ---->      GND

Other pins                                                    ---->       unconnected

 

1)Is right this configuration?

2)Can I use the same GND for all of these pins?

Thank you!

  • Hello Alessandro,

    The ADS8556EVM will not work properly with HVSS grounded.  The ADS8556 requires bipolar analog HVDD/HVSS supplies.  The datasheet of the ADS8556 device specifies a negative supply voltage ranging from-16.5V to -5V.  Depending on the bipolar full-scale voltage range selected when using the ADS8556EVM, the negative supply requirement may change.   For example, if the ADS8556 is used at the 4xVREF range with the internal 3V reference; the ADS8556 will require a votage higher than +/-12V.  You may refer to the recommended operating conditions on page 3 of the ADS8556 datasheet and to the power supply requirements section on page 8.

    The ADS8556EVM board also includes the THS4032 operational amplifier.  The amplifier requires bipolar analog supplies; the specified allowed negative supply is -4.5 to -16.5.   The THS4032 Operational amplifier will require additional headroom to be able to drive the required output swing.  For example, in the case where the ADS8556 is used in the +/-12V full-scale range, the THS4032 will require at least +/-14V in order for the amplifier to have enough headroom.

    Best Regards,

    Luis

     

  • Thank you Luis,

    I have understood that for the evaluation board I need negative voltage, because there are OPAMPs and other components that required dual supply. 

    But reading the datasheet of the ADS8556 for me it appear that the ADC works also with positive to ground voltages:

    I see that I can put HVDD to positive and HSS to GND. Do you agree? 

  • Hi Alessandro,

    The table on the post above refers to the 'Absolute Maximum Ratings' .  These are the maximum/minimum stress voltages ratings that may be forced on the pins of the device without causing permanent damage to the device; however, these are not voltages in which you may be able to operate the device.

    The 'Power Supply Requirements' in the electrical characteristics table on page 8 lists the required supply voltages for operation:

     

    Thank you and Best Regards,

    Luis

     

     

     

  • Ok! Now I have understood! Thank you very much!

    I will use this configuration of the supply voltages:

    (+VA) ----> J1.1 ----> +15 V

    (+5VA) ----> J1.3 ----> +5 V 

    (–VA) ----> J1.2 ----> -15 V

    (–5VA) ----> J1.4 ----> UNCONNECTED

    BGND ----> J1.5 ---->      GND

    AGND ----> J1.6 ---->      GND

    (+3.3V) ----> J1.9 ---->  +3V (Becouse I use the F28335 with low voltage I/O)

    (+5V) ----> J1.10 ----> UNCONNECTED

    (I haven't modify the default position of jumpers, apart the JP4 for have +3V)

    I am using the serial interface. The switch is:

    WORD, 4x, HDW, SER, REDBUF_EN = 0, DASIY_CHAIN = 0, SERA_EN = 1, SERB_EN = 0, SERC_EN = 0, REFen = 1.

    I have put a jumper between J1.9 - J1.10, and I have put a jumper between J4.7 - J4.8 to set high the /STBY.

    Is it ok?

  • Hi Alessandro,

    The voltage supply connections described above appear to be correct (assuming you were referring to J3.x.)

    Yes, The jumper J4.7 to J4.8 should setthe STD by high.  J1.9 to J1.10 should set CS/FS low assuming JP3 J1.7 jumper is is installed.

    Best Regards,

    Luis

     

  • Ok, I have connected the EVM! 
    I have written a program that periodically use GPIO59 to send the CONVST of all channels
     (JP9 is in the default position)
    With an interrupt on GPIO58 I reveal the falling edge of the BUSY signal.
    In the interrupt routine I read with the SPI the 6x16bit of data. 
    I have done some proof:
    I have linked only the channel A0 to 1.035V it is quite a costant value (measured with the scope),
     but the ADC measure the wrong value, and also is always varying a lot.
    This is a screenshot of the watch windows:

    
    
    The SPI communication is fine.
    The problem is that with the same voltage at the input the digital value change a lot: 
    about from 6600 to 6900!
    This happen also if I link the same voltage to the others channels.
    If I link the second channel to ground:

    The value goes from -26 to -34.
    I have used the configuration discussed before.
    Is it a normal behavior?!
  • Hi Alessandro,

    Using a DC signal of +1.035V to drive the ADS8556 when the device is set with Range 4xVREF should yield a code result around +3391.The LSB weight when using the internal reference of 2.5V with the +/-4xVref  range should be given by:

    LSB Weight = 10V/(2^15-1) = ~305uV

    The result you are obtaining is in the order of 6805 codes which corresponds to a voltage of +2.094V.  According to your description you are using the 4xVREF, therefore something does not seem to be correct.

    In my set up, I am currently using the Data Precision Analogic to generate the 1.035V DC signal, and the EVM is currently configured with the THS4032 OPA driving the ADS8556. When forcing the 1.035V at the input obtain a code result of about ~3396, and the variation in the result is about 6 to 10 codes or approximately 2mV -4mV noise.  If I use a shorter wire to connect the source voltage to the inputs, the noise is in the order of 5 codes.  This is with the set up sampling at about ~50kSPS.   If I connect the input to GND, the code variation is only 2 codes. 

    What type of signal source are you using to generate the 1.035V?  What is the position of the buffer jumper JPx on the EVM? What sampling rate is used in your configuration?  Can you provide oscilloscope plots of the SDO_A, BUSY, CONVST, SCLK, FS while reading a conversion result? This will help us verify the timing and the communication. 

    Best Regards,

    Luis

     

     

     

  • Thank you for your answer!

    I am really sorry, the results of my previous post has been taken with the range in the position 2x (so the range is +/- 5V) , and not 4x.

     I will provide you all the information that you have request:

    I am using definitively  4xVREF. (other switch position: WORD,4x,HDW,SER,REFBUF=0,DASIY=0,SERA=1,SERB=SERC=0,REFEN=1).

    My EVM is configured with the THS4032 OPA driving the ADS8556. (jumper JP1 JP2 JP6 JP7 JP5 JP8 default position 1-2)

    JP3 default position 1-7

    JP4 position 3.3V

    JP9 default position 1-2, 4-5, 7-8 (CONVST for all the inputs)

    JP10 JP11 default position +/- 15V for HVDD/ HVSS

    JP12 Open.

    I have insert jumper to J4 position 7-8, J1 position 9-10. 

    I have linked all the GND together. 

    I think that the SPI works correctly, because I can see clearly that when I connect for example the channelX, in the watch windows the variable "dataX" change, without affect the other data channels.

    The analog signal that I use is done by a L7805ACP (5V Voltage Regulator) and a 10kohm potentiometer.

    The power supply of the ADC board is the SEL-LPS Linear Power Supply 

    ( Low voltage outputs supply +5 Vdc (500 mA), +15 Vdc (250 mA), and -15 Vdc (250 mA) of regulated power)

    I have linked these wires: SOMI, SCLK, CONVST, BUSY. (I haven't linked the SIMO becouse I don't want to modify the control register).

    Now some screenshot:

    FIRST PROOF

    Channel A0: 3.004V 

    Channel A1: GND

    Other channels: disconnected.

     Watch windows (Max Value):

    Watch windows (Min Value):

    SECOND PROOF

    Channel A0: 1.008V 



    Channel A1: GND

    Other channels: disconnected.

     Watch windows (Max Value):

    Watch windows (Min Value):

    This is the configuration of my SPI:


    void InitSPI(void)
    {
    SpiaRegs.SPICCR.all =0x000F; // Reset on, output on rising edge, read on falling edge, 16-bit word
    SpiaRegs.SPICTL.all =0x000E; // Enable master mode, shift phase, enable talk, and SPI int disabled.

    EALLOW;
    SysCtrlRegs.LOSPCP.bit.LSPCLK = 5; // SYSCLKOUT / 10 = 15 MHz
    EDIS;

    SpiaRegs.SPIBRR = 49; // SPICLK = LSPCLK / (1 + 29) = 300 kHz
    SpiaRegs.SPIPRI.bit.FREE = 1; // Set so breakpoints don't disturb xmission
    SpiaRegs.SPICCR.bit.SPISWRESET = 1; // Release the SPI from reset
    }

    void InitSpiaGpio(void)
    {
    EALLOW;
    /* Configure SPI-A pins using GPIO regs*/
    // This specifies which of the possible GPIO pins will be SPI functional pins.
    GpioCtrlRegs.GPAMUX2.bit.GPIO16 = 1; // Configure GPIO16 as SPISIMOA
    GpioCtrlRegs.GPAMUX2.bit.GPIO17 = 1; // Configure GPIO17 as SPISOMIA
    GpioCtrlRegs.GPAMUX2.bit.GPIO18 = 1; // Configure GPIO18 as SPICLKA
    GpioCtrlRegs.GPAMUX2.bit.GPIO19 = 1; // Configure GPIO19 as SPISTEA ???_0 or 1_???
    EDIS;
    }
    
    
    void delay_loop(long end)
    {
    long i;
    for (i = 0; i < end; i++)
    {
    asm(" NOP");
    EALLOW;
    SysCtrlRegs.WDKEY = 0x55;
    SysCtrlRegs.WDKEY = 0xAA;
    EDIS;
    }
    }
    
    
    And this is the interrupt rutine (for reading the voltage value) that is been called when 
    the GPIO58 reveal a falling edge of the BUSY signal:

    
    
    interrupt void xint3_isr(void) // REVELEAD A FALLING EDGE OF THE BUSY SIGNAL
    {
    number_breakpoint++;

    // Acknowledge this interrupt to get more from group 12
    PieCtrlRegs.PIEACK.all = PIEACK_GROUP12;


    GpioDataRegs.GPBDAT.bit.GPIO59 = 0; // START OF CONVERSION = 0

    SpiaRegs.SPITXBUF = 0x00; /* Send dummy data */
    while (SpiaRegs.SPISTS.bit.BUFFULL_FLAG == 1){} /* Wait for SPITXBUF is free */
    while (SpiaRegs.SPISTS.bit.INT_FLAG == 0){} /* Wait for RX to finish */
    x = SpiaRegs.SPIRXBUF; /* Read RXBUF to clear INT_FLAG */
    data_channelA0 = x;

    SpiaRegs.SPITXBUF = 0x00; /* Send dummy data */
    while (SpiaRegs.SPISTS.bit.BUFFULL_FLAG == 1){} /* Wait for SPITXBUF is free */
    while (SpiaRegs.SPISTS.bit.INT_FLAG == 0){} /* Wait for RX to finish */
    x = SpiaRegs.SPIRXBUF; /* Read RXBUF */
    data_channelA1 = x;

    SpiaRegs.SPITXBUF = 0x00; /* Send dummy data */
    while (SpiaRegs.SPISTS.bit.BUFFULL_FLAG == 1){} /* Wait for SPITXBUF is free */
    while (SpiaRegs.SPISTS.bit.INT_FLAG == 0){} /* Wait for RX to finish */
    x = SpiaRegs.SPIRXBUF; /* Read RXBUF */
    data_channelB0 = x;

    SpiaRegs.SPITXBUF = 0x00; /* Send dummy data */
    while (SpiaRegs.SPISTS.bit.BUFFULL_FLAG == 1){} /* Wait for SPITXBUF is free */
    while (SpiaRegs.SPISTS.bit.INT_FLAG == 0){} /* Wait for RX to finish */
    x = SpiaRegs.SPIRXBUF; /* Read RXBUF */
    data_channelB1 = x;

    SpiaRegs.SPITXBUF = 0x00; /* Send dummy data */
    while (SpiaRegs.SPISTS.bit.BUFFULL_FLAG == 1){} /* Wait for SPITXBUF is free */
    while (SpiaRegs.SPISTS.bit.INT_FLAG == 0){} /* Wait for RX to finish */
    x = SpiaRegs.SPIRXBUF; /* Read RXBUF */
    data_channelC0 = x;

    SpiaRegs.SPITXBUF = 0x00; /* Send dummy data */
    while (SpiaRegs.SPISTS.bit.BUFFULL_FLAG == 1){} /* Wait for SPITXBUF is free */
    while (SpiaRegs.SPISTS.bit.INT_FLAG == 0){} /* Wait for RX to finish */
    x = SpiaRegs.SPIRXBUF; /* Read RXBUF */
    data_channelC1 = x;


    voltage_channelA0 = data_channelA0/3276.8;
    voltage_channelA1 = data_channelA1/3276.8;
    voltage_channelB0 = data_channelB0/3276.8;
    voltage_channelB1 = data_channelB1/3276.8;
    voltage_channelC0 = data_channelC0/3276.8;
    voltage_channelC1 = data_channelC1/3276.8;

    delay_loop(1000);
    GpioDataRegs.GPBDAT.bit.GPIO59 = 1; // START OF CONVERSION = 1

    }

    Here some screenshots of the SPI signals:
    BUSY

    CONVST:

    SOMIA:

    FS: always low.
    SCLK:


    Sometimes (like once every several minutes) I get an evident error in the voltage 
    (for example about 2V instead of 1V).  ---> SPI problem? Strongly unwanted!
    In rare cases I lose the control of the ADC board. I cannot do nothing apart
    reset the CPU and power off and power on again the board. ---> ADC problem? Strongly unwanted!
  • Hi Alessandro,

    Thank you for providing the oscilloscope plots and the information.  The issues with the voltage shifting from 1V to 2V and losing control to the ADC could potentially be related to communication timing issues or could be caused by noise/overshoot occuring due to a grounding problem.    Is the TMS320 on a PCB board that includes a GND plane? Are the SOMI, SCLK, CONVST, BUSY connected through jumpers? How is the ADS8556EVM connected to the TMS320F28335 device?

    The oscilloscope plots provided display small on the FORUM screen; and I am having difficulty reading them.  Would it be possible to post them again with the plots zooming at a different scales to verify the timing? You may also attach the plots in a  *.zip file; in this manner, I can view the plots at their original size

    Thank you and Best Regards,

    Luis

     

  • I have founded the problem!!! Now it works fine (anyway I will do other long proofs to be sure in the next days). 

    PreviousIy I set low the CONVST immediately after the falling edge of the BUSY signal. Now I have moved the istruction:

    GpioDataRegs.GPBDAT.bit.GPIO59 = 0; // START OF CONVERSION = 0

    at the and of the reading procedure. Now it works fine!!!

    I have a further question: I am using now this ADC and the DAC8568 together. I want to use two different GPIO (e.g. GPIO60, GPIO61) as ChipSelect for drive this two devices.

    I have linked all the cablesfrom my F28335 Experimenter kit to the ADC and DAC ( splitting the SPICLK). I have checked the CLK, the SOMI and SIMO signals and they appear satisfactory!

    But the problem are the GPIOxx used as output direct to the ChipSelect devices (for the ADS8556 EVM is the J1.7, in the DAC8568 is the J1.1, and the jumper JP5 in the position 2-3).

    But the signal that I obtain at this pin is undefined ( it should be a square wave, becouse sometime is 1 and sometime is 0):

    This is the configuration that I used:

     // GPIO60 is Output
    EALLOW;
    GpioCtrlRegs.GPBMUX2.bit.GPIO60 = 0; // GPIO60
    GpioCtrlRegs.GPBPUD.bit.GPIO60 = 0; // Pull up
    GpioCtrlRegs.GPBDIR.bit.GPIO60 = 1; // Output
    EDIS;

    // GPIO61 is Output
    EALLOW;
    GpioCtrlRegs.GPBMUX2.bit.GPIO61 = 0; // GPIO61
    GpioCtrlRegs.GPBPUD.bit.GPIO61 = 0; // Pull up
    GpioCtrlRegs.GPBDIR.bit.GPIO61 = 1; // Output
    EDIS;

    And I have used  in this way:

    GpioDataRegs.GPBDAT.bit.GPIO61 = 0; //chipselect low: receiving data
    SpiaRegs.SPITXBUF = 0x00; /* Send dummy data */
    while (SpiaRegs.SPISTS.bit.BUFFULL_FLAG == 1){} /* Wait for SPITXBUF is free */
    while (SpiaRegs.SPISTS.bit.INT_FLAG == 0){} /* Wait for RX to finish */
    x = SpiaRegs.SPIRXBUF; /* Read RXBUF */
    data_channelA1 = x;
    GpioDataRegs.GPBDAT.bit.GPIO61 = 1; //trasmission finished

    The GPIO61 goes down immedeately. How can I take low the GPIO voltage only for the time of the communication?

    Have I to use timer? Please help me!  Thanks!

  • Hi Alessandro,

    I'm not sure I understand what you are asking here.  Are you saying that the last line above does not return GPIO61 to a high state?  Or is it that the time from GPIO61 going low until your SPI communication starts is too long for your application?

  • I have seen that you have split the post, but I have deleted it because I have already resolved using the SPI and

    the McBSP as SPI! Finally these two devices are working well together! I have a question referred to the ADC8556:

    I use it to measure a differential signal (sinewave of 3kHz), I have designed a signal conditioner interface,

    (I have attached the screenshot of the schematic in a .rar file). 

    As you see in the schematic, I use single supply OPAMP, and so I arrive at the output of the anti-aliasing filter with

    a full-positive sinewave (about from 0.5V to 10V). At the end I use a capacitor, for erase the offset, because this

    ADC accept also negative value. I have seen that without connecting the ADC, the output after the capacitor

    is a sinewave centered on the 0V (about from -5V to +5V). But when I attach the ADC, the sinewave goes down,

    and it become all negative (about from -12V to -2V).

    I cannot understand this behavior. 

    Thank you!

    2620.8233.23.rar