For a research project we need to accurately simulate in software the ADS1178 D-S ADC modulator and FIR decimation filter. The ADS1178 data sheet indicates that the FIR filter is a multi-stage filter with total decimation factor of 64 and the document provides frequency and step response plots.
I have designed a digital FIR decimation filter trying to replicate the frequency response plots but encountered some issues that are most likely due to the fact that I do not have information on the filter topology, number of stages, order and decimation factor of each stage, processing between the stages, etc.
My questions are:
1. Does this information exist in any document published by TI? If it exists, can you provide a link?
2. I understand that some of this information cannot probably be shared, but Is it possible to get any additional infomation about the FIR filter as described above, even top level?
I appreciate your help.
Details of the ADS1178/1278 digital filter outside of what the data sheet states are part of the "secret sauce" of the part and cannot necessarily be shared. As you mentioned it is a FIR filter which uses over 70 "taps" or conversion results to reside at its final result.The benefit of this topology is the steep roll off at the Nyquist frequency while the downside is the heavy latency.
I understand your restrictions and appreciate your quick answer, thank you.
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