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ADS8860 Internal conversion clock

Other Parts Discussed in Thread: ADS8860

Hello,

ADS8860 data sheet defines "The device uses an internal clock for conversion",

1) Why SCLK is needed to be toggled 5 times during conversion?

2)  How do I control sample rate?

Thank you!

  • Zion,

    I think the SAR data converters apps engineers are a bit busy, so I thought I'd chime in with an answer.


    1. I'm not sure what you're referring to with the 5 SCLK toggles for the conversion. Can you tell me where in the datasheet it mentions this?


    2. You control the sample rate with the CONVST pin. Every time you toggle the pin high and then return it low, it initiates a conversion. You can change the rate at which CONVST is toggled and therefore the sample rate. After every conversion is completed, the device powers itself down and you can clock out the data.

    Joseph Wu

  • Hi Joseph,

    I think Zion's first question is referring to Figure 1 and 2 (also 51/52/55/57) for timing diagrams.

    Hi Zion,

    It's not exact 5 SCLKs for the conversion, it's just a schematic drawing, the number of SCLKs depends on the SCLK you use and set up on CPU/FPGA,ADS8860's maximum conversion time is 710ns,theoretically its maximum SCLK frequency is 66.6MHz(15ns) which ADS8860 can support. When you select 7.042MHz as SCLK,the number of SCLKs for the conversion will be close to 5, but when your SCLK is not this frequency, it will not be 5.

    Best regards

    Dale

  • Dear Dale,

    Thank you for the answer, but it still not clear enough for me:

    I use microprocessor to handle the SPI, and it will generate only 16 clocks, I can't generate additional clocks! (especially that part of them needed before CS set low, then 16 after CS set low...) - so do I MUST have these additional clocks?

    Thank you,

    Zion

  • Hi Zion,

    The ADS8860 only uses an internal clock to perform conversions.The external SCLK is only used for
    a serial data read operation, so It doesn't matter if you send out the SCLK pulse during conversion or not.The conversion time is controlled by CONVST pin. You can refer to the timing diagram as above. The numbers of SCLK during conversion is just an example.

    Best regards

    Dale Li