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ADS1299 range

Other Parts Discussed in Thread: ADS1299

I am using the ADS1299 in a new design and ran into some behavior while I was debugging that I am unable to explain.

The output range of the internal amplifiers seems to vary based on the gain settings.  AVdd for the converter is +5V.  I have a single ended input signal on Vin+ centered around 2.5V and Vin- is 2.5V.  Vref is the internal 4.5V.  With a gain of 1, the A/D converter is measuring +2.5 to -2.5, which is what I would expect.  With a gain of 2, the A/D converter measurement ranges from +3.3 to -3.3, outside of which it clips.  The clipping is not a hard digital value.  There is some variation, including somewhat of an inversion of the sine wave tip, increasing as the overdriven input increases.  As gain increases, the ADC range increases, but it isnt until a gain of 12 that the full +/- 4.5V range can be seen.  

The values for each of the gain settings are as follows

Gain       Vadc

1             +/-2.5

2             +/-3.3

4             +/-3.9

6             +/-4.25

8             +/-4.4

12           +/-4.5

24           +/-4.5

Vadc is the output voltage from the converter, not compensated for gain setting.

I initially found this behavior debugging my custom design, but I tested it with the ADS1299EEG-FE development board and found the same thing.

I wasn't able to find anything in the data sheet to explain what is going on.  The amplifiers are described as differential input, differential output amplifiers that drive to within 0.2 of the power supply rails, so the output should be +/-4.6V (clipped at +/-4.5V by the ADC) regardless of gain setting.

The part is being used in an EEG application, so signal levels will not ever reach these amplitiudes, but DC offsets can be large and I need to understand what the part limits are so I can properly specify the input range of our device.

Tom

  • Hi Tom,

    You are correct that the ADC saturates at +/- full-scale (+/- VREF). What I believe you are seeing is a violation of the PGA common-mode. Without increasing the input signal amplitude, you are changing the common-mode range as gain increases.

    I was able to replicate similar results with the EVM using the same setup as you: 5V single-supply, INN = 2.5 V, INP = 1 V sine wave with 2.5 V offset. As I continued to overdrive the PGA and further exceed the common-mode limitation, I did eventually saturate the ADC inputs at +/- 4.5 V. However, even at Gain = 4 (Green), you notice there is already some clipping at about +/- 4 V. From the Excel table above, that is the point where I begin to exceed the input common-mode range.

    So to summarize, the ADC differential input is limited by VREF, but we also have to be careful not to overdrive the PGA beyond the supply rail or the common-mode limits.

    Best Regards,

  • Thanks Ryan,


    I hadn't looked closely enough at the PGA structure, although I now see that the data sheet has a schematic for it that I ignored.  When I read differential input/differential output PGA, I assumed the differential outputs were equal and centered around VCC/2.  After seeing the PGA schematic, I realize that is not the case and the waveforms I am seeing make perfect sense.