• State Resolved
  • Locked Locked
  • Replies 6 replies
  • Subscribers 47 subscribers
  • Views 772 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Ads1672 datasheet is missing min and max values for tCLKDR

ArthurDent
Prodigy 60 points
Other Parts Discussed in Thread: ADS1672, ADS1675

Hi

Can anyone tell me the min and max values of tCLKDR (i.e. the CLK to DRDY delay)? The datasheet only list the typical value.

I will synchronize ten ADS1672. To reduce the number of interface lines I want to use SCLK and DRDY only from one of the ADCs. However, this is only possible if the DRDY (and SCLK) variations between the ADCs are not to large.

To make sure this will work I need the min and max values of tCLKDR.

BR

Vidar

  • 0
    TI__Mastermind 23235 points

    Hi Vidar -

    We can try and give you some better guidance, but we cannot provide min and max values since min and max values are guaranteed.  Without testing many units across multiple conditions, we cannot guarantee these values.

    Allow us some time to investigate and see if we can provide some better guidance.

  • 0 in reply to Greg Hupp
    Prodigy 60 points

     

    Hi Greg

    That would be great.

    I have had a look at the datasheet for ADS1675, which specify min and max for tCLKDR: 23 to 30 ns, i.e. a window of 7 ns. Is 7ns what I can expect on the ADS1672 as well?

    In the datasheet for ADS1672:
    In Figure 1, tCLKDR is measured from the negative edge of CLK, while in Figure 2 tCLKDR is measured from the positive edge of CLK. Is this correct?

    BR
    Vidar

  • 0 in reply to ArthurDent
    TI__Mastermind 23235 points

    Hi Vidar -

    Give us some time to confer with the design team to see what we can share.  I will keep you updated.

  • 0 in reply to ArthurDent
    TI__Mastermind 23235 points

    Hi Vidar -

    We wanted to provide you with a quick update. 

    We are continuing to collect information, but in regards to the comparison of tCLKDR between ADS1672 and ADS1675, this is a good guideline.  While we can't guarantee the values for the ADS1675, using the ADS1672 plus a little margin should be a good first order estimate.

  • 0
    Prodigy 30 points
    Hi Vidar,

    Did you end up using SCLK and DRDY from only one ADS1672? If so, how did it work for you?

    Thanks,

    Kevin
  • 0 in reply to Kevin Shaw41
    Prodigy 60 points

    Hi

    No, I did not use SCLK and DRDY from only one ADC.
    My ADCs are isolated from the digital interface, and the max/min delay variations of the isolators together with the max/min values of the ADCs digital interface were too large for this to work.

    BR

    Vidar